radeonsi: apply a tessellation bug workaround for SI
authorMarek Olšák <marek.olsak@amd.com>
Tue, 29 Nov 2016 19:41:23 +0000 (20:41 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Thu, 1 Dec 2016 01:16:51 +0000 (02:16 +0100)
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeonsi/si_state_draw.c

index 10073ef9d742f58461fcf47f60574d228654e8ec..cba5a03bebef07f5e3fc4acda320d3c4288435ca 100644 (file)
@@ -166,6 +166,13 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
         * specific value is taken from the proprietary driver.
         */
        *num_patches = MIN2(*num_patches, 40);
+
+       /* SI bug workaround - limit LS-HS threadgroups to only one wave. */
+       if (sctx->b.chip_class == SI) {
+               unsigned one_wave = 64 / MAX2(num_tcs_input_cp, num_tcs_output_cp);
+               *num_patches = MIN2(*num_patches, one_wave);
+       }
+
        sctx->last_num_patches = *num_patches;
 
        output_patch0_offset = input_patch_size * *num_patches;