+2004-07-24 Zack Weinberg <zack@codesourcery.com>
+
+ * config/ia64/ia64.c (general_xfmode_operand)
+ (destination_xfmode_operand): Delete.
+ * config/ia64/ia64.h (PREDICATE_CODES): Remove them.
+ * config/ia64/ia64.md (*movxf_internal): Use general_operand
+ and destination_operand.
+
+2004-07-24 Alexander Kabaev <kan@freebsd.org>
+
+ * config/ia64/ia64.h (SUBTARGET_EXTRA_SPECS): Default to nothing.
+ (EXTRA_SPECS): Use SUBTARGET_EXTRA_SPECS.
+
2004-07-24 Alexander Kabaev <kan@freebsd.org>
Zack Weinberg <zack@codesourcery.com
&& REGNO (op) == AR_PFS_REGNUM);
}
-/* Like general_operand, but don't allow (mem (addressof)). */
-
-int
-general_xfmode_operand (rtx op, enum machine_mode mode)
-{
- if (! general_operand (op, mode))
- return 0;
- return 1;
-}
-
-/* Similarly. */
-
-int
-destination_xfmode_operand (rtx op, enum machine_mode mode)
-{
- if (! destination_operand (op, mode))
- return 0;
- return 1;
-}
-
/* Similarly. */
int
builtin_define("__BIG_ENDIAN__"); \
} while (0)
+#ifndef SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS
+#endif
+
#define EXTRA_SPECS \
- { "asm_extra", ASM_EXTRA_SPEC },
+ { "asm_extra", ASM_EXTRA_SPEC }, \
+ SUBTARGET_EXTRA_SPECS
#define CC1_SPEC "%(cc1_cpu) "
{ "ar_lc_reg_operand", {REG}}, \
{ "ar_ccv_reg_operand", {REG}}, \
{ "ar_pfs_reg_operand", {REG}}, \
-{ "general_xfmode_operand", {SUBREG, REG, CONST_DOUBLE, MEM}}, \
-{ "destination_xfmode_operand", {SUBREG, REG, MEM}}, \
{ "xfreg_or_fp01_operand", {REG, CONST_DOUBLE}}, \
{ "basereg_operand", {SUBREG, REG}},
;; ??? There's no easy way to mind volatile acquire/release semantics.
(define_insn "*movxf_internal"
- [(set (match_operand:XF 0 "destination_xfmode_operand" "=f,f, m")
- (match_operand:XF 1 "general_xfmode_operand" "fG,m,fG"))]
+ [(set (match_operand:XF 0 "destination_operand" "=f,f, m")
+ (match_operand:XF 1 "general_operand" "fG,m,fG"))]
"ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %F1