[ARM] Fix arm bootstrap failure due to -Werror=shift-negative-value

	* config/arm/arm.c (arm_gen_constant): Use HOST_WIDE_INT_M1U instead
	of -1 when shifting.  Change type of val to unsigned HOST_WIDE_INT.
	Update prototype.

From-SVN: r227798

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bc00735e07f35b40f675ba4fbb5f272f68bc31f0..6f60273a86d8b37f73dfd0e6b6a898ca27368f5d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-09-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/arm/arm.c (arm_gen_constant): Use HOST_WIDE_INT_M1U instead
+       of -1 when shifting.  Change type of val to unsigned HOST_WIDE_INT.
+       Update prototype.
+
 2015-09-15  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/67470

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index e5d1a458921ab2dbf6c32639324aef1ce351c9fb..62a63abc68f550b3e91172fe55fdc668b14c83bb 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -95,7 +95,7 @@ static int arm_compute_static_chain_stack_bytes (void);
 static arm_stack_offsets *arm_get_frame_offsets (void);
 static void arm_add_gc_roots (void);
 static int arm_gen_constant (enum rtx_code, machine_mode, rtx,
-                            HOST_WIDE_INT, rtx, rtx, int, int);
+                            unsigned HOST_WIDE_INT, rtx, rtx, int, int);
 static unsigned bit_count (unsigned long);
 static unsigned feature_count (const arm_feature_set*);
 static int arm_address_register_rtx_p (rtx, int);
@@ -4229,8 +4229,8 @@ emit_constant_insn (rtx cond, rtx pattern)
 
 static int
 arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
-                 HOST_WIDE_INT val, rtx target, rtx source, int subtargets,
-                 int generate)
+                 unsigned HOST_WIDE_INT val, rtx target, rtx source,
+                 int subtargets, int generate)
 {
   int can_invert = 0;
   int can_negate = 0;
@@ -4600,7 +4600,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
          mvn   r0, r0, asl #12
          mvn   r0, r0, lsr #12  */
       if (set_sign_bit_copies > 8
-         && (val & (-1 << (32 - set_sign_bit_copies))) == val)
+         && (val & (HOST_WIDE_INT_M1U << (32 - set_sign_bit_copies))) == val)
        {
          if (generate)
            {