mem: Ensure that InvalidateReq is not forwarded as ReadExReq
authorAndreas Hansson <andreas.hansson@arm.com>
Wed, 24 Feb 2016 09:16:57 +0000 (04:16 -0500)
committerAndreas Hansson <andreas.hansson@arm.com>
Wed, 24 Feb 2016 09:16:57 +0000 (04:16 -0500)
This patch fixes an issue where an InvalidationReq only traversed one
level of the cache hierarchy, and was subsequently turned into a
ReadExReq due to it needing writable, and the command not being
checked for explicitly.

src/mem/cache/cache.cc

index e9b909646e8f6512f1a95bf9f2148af4fd50b6e2..724ccc7d6c273810e3cc578f9cad5a74957dfbcf 100644 (file)
@@ -966,7 +966,8 @@ Cache::getBusPacket(PacketPtr cpu_pkt, CacheBlk *blk,
         // where the determination the StoreCond fails is delayed due to
         // all caches not being on the same local bus.
         cmd = MemCmd::SCUpgradeFailReq;
-    } else if (cpu_pkt->cmd == MemCmd::WriteLineReq) {
+    } else if (cpu_pkt->cmd == MemCmd::WriteLineReq ||
+               cpu_pkt->cmd == MemCmd::InvalidateReq) {
         // forward as invalidate to all other caches, this gives us
         // the line in Exclusive state, and invalidates all other
         // copies