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diff --git a/openpower/sv/biginteger/analysis.mdwn b/openpower/sv/biginteger/analysis.mdwn
index e318f9127ad070a49032e0efdde8f56a825bc269..3e59236ae0997593596295024ba3b197dae83427 100644 (file)
--- a/openpower/sv/biginteger/analysis.mdwn
+++ b/openpower/sv/biginteger/analysis.mdwn
@@ -249,7 +249,10 @@ purpose of letting it be added onto the next BigInt digit.
     RT = lowerhalf(product)
     RC = upperhalf(product)
 
-Successive iterations thus effectively use RC as a 64-bit carry, and
+Horizontal-First Mode therefore may be applied to just this one
+instruction.
+Successive sequential iterations effectively use RC as a kind of
+64-bit carry, and
 as noted by Intel in their notes on mulx,
 `RA*RB+RC+RD` cannot overflow, so does not require
 setting an additional CA flag. We first cover the chain of