Cell: Use multiple DMA tags for the dcache.
authorIan Romanick <idr@us.ibm.com>
Thu, 21 Feb 2008 19:01:35 +0000 (11:01 -0800)
committerIan Romanick <idr@us.ibm.com>
Tue, 26 Feb 2008 00:18:08 +0000 (16:18 -0800)
src/gallium/drivers/cell/spu/spu_dcache.c
src/gallium/drivers/cell/spu/spu_main.h

index 698a5790bb0511168bb861ea742f1c455dbf2261..3baeaea998183b826d5af46adec76d6e988aba26 100644 (file)
@@ -33,7 +33,7 @@
 #define CACHE_NAME            data
 #define CACHED_TYPE           qword
 #define CACHE_TYPE            CACHE_TYPE_RO
-#define CACHE_SET_TAGID(set)  TAG_VERTEX_BUFFER
+#define CACHE_SET_TAGID(set)  (((set) & 0x03) + TAG_DCACHE0)
 #define CACHE_LOG2NNWAY       2
 #define CACHE_LOG2NSETS       6
 #include <cache-api.h>
index 5c95d112ac146015b9fe6e1b3a9f8259e0eb1669..d14f1abbe7405392f8430371dc0cdcb4d20c9adb 100644 (file)
@@ -131,7 +131,10 @@ extern boolean Debug;
 #define TAG_BATCH_BUFFER      17
 #define TAG_MISC              18
 #define TAG_TEXTURE_TILE      19
-#define TAG_INSTRUCTION_FETCH 20
+#define TAG_DCACHE0           20
+#define TAG_DCACHE1           21
+#define TAG_DCACHE2           22
+#define TAG_DCACHE3           23