}
string top_opt, blif_file, edif_file, json_file;
- bool noccu2, nodffe, nobram, nodram, nomux, flatten, retime, abc2, abc9, vpr;
- bool noccu2, nodffe, nobram, nodram, nowidelut, flatten, retime, abc2, vpr;
++ bool noccu2, nodffe, nobram, nodram, nowidelut, flatten, retime, abc2, abc9, vpr;
void clear_flags() YS_OVERRIDE
{
run("abc", " (only if -abc2)");
}
run("techmap -map +/ecp5/latches_map.v");
- if (nowidelut)
- run("abc -lut 4 -dress");
- else
- run("abc -lut 4:7 -dress");
+ if (abc9) {
+ run("abc9 -lut +/ecp5/abc_5g.lut -box +/ecp5/abc_5g.box -W 200");
+ } else {
- if (nomux)
++ if (nowidelut)
+ run("abc -lut 4 -dress");
+ else
+ run("abc -lut 4:7 -dress");
+ }
-
run("clean");
}
log("\n");
}
- std::string top_opt, edif_file, blif_file, arch;
+ std::string top_opt, edif_file, blif_file, abc, arch;
- bool flatten, retime, vpr, nocarry, nobram, nodram, nosrl;
+ bool flatten, retime, vpr, nobram, nodram, nosrl, nocarry, nowidelut;
void clear_flags() YS_OVERRIDE
{
retime = true;
continue;
}
- if (args[argidx] == "-nomux") {
- nomux = true;
+ if (args[argidx] == "-nocarry") {
+ nocarry = true;
+ continue;
+ }
++ if (args[argidx] == "-nowidelut") {
++ nowidelut = true;
+ continue;
+ }
if (args[argidx] == "-vpr") {
vpr = true;
continue;
}
if (check_label("map_luts")) {
- if (help_mode)
+ run("opt_expr -mux_undef");
+ if (abc == "abc9")
+ run(abc + " -lut +/xilinx/abc_xc7.lut -box +/xilinx/abc_xc7.box -W " + XC7_WIRE_DELAY + string(retime ? " -dff" : ""));
+ else if (help_mode)
- run(abc + " -luts 2:2,3,6:5,10,20 [-dff]");
+ run("abc -luts 2:2,3,6:5[,10,20] [-dff]", "(skip if 'nowidelut', only for '-retime')");
+ else if (nowidelut)
+ run("abc -luts 2:2,3,6:5" + string(retime ? " -dff" : ""));
else
- run("abc -luts 2:2,3,6:5,10,20" + string(retime ? " -dff" : ""));
+ run(abc + " -luts 2:2,3,6:5,10,20" + string(retime ? " -dff" : ""));
run("clean");
+
// This shregmap call infers fixed length shift registers after abc
// has performed any necessary retiming
if (!nosrl || help_mode)