(define_insn "*ctr<mode>_internal1"
[(set (pc)
- (if_then_else (ne (match_operand:P 1 "register_operand" "c,*r,*r,*r")
+ (if_then_else (ne (match_operand:P 1 "register_operand" "c,*b,*b,*b")
(const_int 1))
(label_ref (match_operand 0 "" ""))
(pc)))
return \"bdz $+8\;b %l0\";
}"
[(set_attr "type" "branch")
- (set_attr "length" "*,12,16,16")])
+ (set_attr "length" "*,16,20,20")])
(define_insn "*ctr<mode>_internal2"
[(set (pc)
- (if_then_else (ne (match_operand:P 1 "register_operand" "c,*r,*r,*r")
+ (if_then_else (ne (match_operand:P 1 "register_operand" "c,*b,*b,*b")
(const_int 1))
(pc)
(label_ref (match_operand 0 "" ""))))
return \"bdnz $+8\;b %l0\";
}"
[(set_attr "type" "branch")
- (set_attr "length" "*,12,16,16")])
+ (set_attr "length" "*,16,20,20")])
;; Similar but use EQ
(define_insn "*ctr<mode>_internal5"
[(set (pc)
- (if_then_else (eq (match_operand:P 1 "register_operand" "c,*r,*r,*r")
+ (if_then_else (eq (match_operand:P 1 "register_operand" "c,*b,*b,*b")
(const_int 1))
(label_ref (match_operand 0 "" ""))
(pc)))
return \"bdnz $+8\;b %l0\";
}"
[(set_attr "type" "branch")
- (set_attr "length" "*,12,16,16")])
+ (set_attr "length" "*,16,20,20")])
(define_insn "*ctr<mode>_internal6"
[(set (pc)
- (if_then_else (eq (match_operand:P 1 "register_operand" "c,*r,*r,*r")
+ (if_then_else (eq (match_operand:P 1 "register_operand" "c,*b,*b,*b")
(const_int 1))
(pc)
(label_ref (match_operand 0 "" ""))))
return \"bdz $+8\;b %l0\";
}"
[(set_attr "type" "branch")
- (set_attr "length" "*,12,16,16")])
+ (set_attr "length" "*,16,20,20")])
;; Now the splitters if we could not allocate the CTR register
(clobber (match_scratch:CC 3 ""))
(clobber (match_scratch:P 4 ""))]
"reload_completed"
- [(parallel [(set (match_dup 3)
- (compare:CC (plus:P (match_dup 1)
- (const_int -1))
- (const_int 0)))
- (set (match_dup 0)
- (plus:P (match_dup 1)
- (const_int -1)))])
+ [(set (match_dup 3)
+ (compare:CC (match_dup 1)
+ (const_int 1)))
+ (set (match_dup 0)
+ (plus:P (match_dup 1)
+ (const_int -1)))
(set (pc) (if_then_else (match_dup 7)
(match_dup 5)
(match_dup 6)))]
(clobber (match_scratch:CC 3 ""))
(clobber (match_scratch:P 4 ""))]
"reload_completed && ! gpc_reg_operand (operands[0], SImode)"
- [(parallel [(set (match_dup 3)
- (compare:CC (plus:P (match_dup 1)
- (const_int -1))
- (const_int 0)))
- (set (match_dup 4)
- (plus:P (match_dup 1)
- (const_int -1)))])
+ [(set (match_dup 3)
+ (compare:CC (match_dup 1)
+ (const_int 1)))
+ (set (match_dup 4)
+ (plus:P (match_dup 1)
+ (const_int -1)))
(set (match_dup 0)
(match_dup 4))
(set (pc) (if_then_else (match_dup 7)