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SPI: TEMP HACK do not merge!
author
Megan Wachs
<megan@sifive.com>
Fri, 24 Mar 2017 20:24:45 +0000
(13:24 -0700)
committer
Megan Wachs
<megan@sifive.com>
Fri, 24 Mar 2017 20:24:45 +0000
(13:24 -0700)
Hard code 3-cycle synchronizer for SPI input without Pinmux.
src/main/scala/devices/spi/SPIPeriphery.scala
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diff --git
a/src/main/scala/devices/spi/SPIPeriphery.scala
b/src/main/scala/devices/spi/SPIPeriphery.scala
index 1509ea73c7a38bfae1cb3e3182a8ee4f2aad9636..229559e956354b330edf97480166d7ea6f6f0a7d 100644
(file)
--- a/
src/main/scala/devices/spi/SPIPeriphery.scala
+++ b/
src/main/scala/devices/spi/SPIPeriphery.scala
@@
-56,4
+56,8
@@
trait HasPeripherySPIFlashModule extends HasTopLevelNetworksModule {
val outer: HasPeripherySPIFlash
val io: HasPeripherySPIFlashBundle
io.qspi <> outer.qspi.module.io.port
+ //HACK -- introduce delay elements to synchronize these inputs.
+ (io.qspi.dq zip outer.qspi.module.io.port.dq).foreach{ case (i, o) =>
+ o.i := ShiftRegister(i.i, 3)
+ }
}