* config/m68k/3b1.h: Fix comment formatting.
* config/m68k/3b1g.h: Likewise.
* config/m68k/a-ux.h: Likewise.
* config/m68k/amix.h: Likewise.
* config/m68k/apollo68.h: Likewise.
* config/m68k/atari.h: Likewise.
* config/m68k/aux-exit.c: Likewise.
* config/m68k/ccur-GAS.h: Likewise.
* config/m68k/crds.h: Likewise.
* config/m68k/dpx2.h: Likewise.
* config/m68k/dpx2g.h: Likewise.
* config/m68k/hp310.h: Likewise.
* config/m68k/hp320.h: Likewise.
* config/m68k/isi.h: Likewise.
* config/m68k/linux.h: Likewise.
* config/m68k/lynx.h: Likewise.
* config/m68k/m68k-psos.h: Likewise.
* config/m68k/m68k.c: Likewise.
* config/m68k/m68k.h: Likewise.
* config/m68k/m68k.md: Likewise.
* config/m68k/m68kelf.h: Likewise.
* config/m68k/m68kv4.h: Likewise.
* config/m68k/mot3300.h: Likewise.
* config/m68k/news.h: Likewise.
* config/m68k/next.h: Likewise.
* config/m68k/pbb.h: Likewise.
* config/m68k/plexus.h: Likewise.
* config/m68k/sgs.h: Likewise.
* config/m68k/sun3.h: Likewise.
* config/m68k/tower.h: Likewise.
* config/m68k/vxm68k.h: Likewise.
From-SVN: r46692
+2001-11-01 Kazu Hirata <kazu@hxi.com>
+
+ * config/m68k/3b1.h: Fix comment formatting.
+ * config/m68k/3b1g.h: Likewise.
+ * config/m68k/a-ux.h: Likewise.
+ * config/m68k/amix.h: Likewise.
+ * config/m68k/apollo68.h: Likewise.
+ * config/m68k/atari.h: Likewise.
+ * config/m68k/aux-exit.c: Likewise.
+ * config/m68k/ccur-GAS.h: Likewise.
+ * config/m68k/crds.h: Likewise.
+ * config/m68k/dpx2.h: Likewise.
+ * config/m68k/dpx2g.h: Likewise.
+ * config/m68k/hp310.h: Likewise.
+ * config/m68k/hp320.h: Likewise.
+ * config/m68k/isi.h: Likewise.
+ * config/m68k/linux.h: Likewise.
+ * config/m68k/lynx.h: Likewise.
+ * config/m68k/m68k-psos.h: Likewise.
+ * config/m68k/m68k.c: Likewise.
+ * config/m68k/m68k.h: Likewise.
+ * config/m68k/m68k.md: Likewise.
+ * config/m68k/m68kelf.h: Likewise.
+ * config/m68k/m68kv4.h: Likewise.
+ * config/m68k/mot3300.h: Likewise.
+ * config/m68k/news.h: Likewise.
+ * config/m68k/next.h: Likewise.
+ * config/m68k/pbb.h: Likewise.
+ * config/m68k/plexus.h: Likewise.
+ * config/m68k/sgs.h: Likewise.
+ * config/m68k/sun3.h: Likewise.
+ * config/m68k/tower.h: Likewise.
+ * config/m68k/vxm68k.h: Likewise.
+
2001-10-31 DJ Delorie <dj@redhat.com>
* config/mips/mips.h (mips_cache_flush_func): Prototype.
#define ASM_NO_SKIP_IN_TEXT 1
-/* The beginnings of sdb support... */
+/* The beginnings of sdb support... */
#define ASM_OUTPUT_SOURCE_FILENAME(FILE, FILENAME) \
do { fprintf (FILE, "\tfile\t"); \
(sdb_begin_function_line \
? (LINENO) - sdb_begin_function_line : 1))
-/* Yet another null terminated string format. */
+/* Yet another null terminated string format. */
#define ASM_OUTPUT_ASCII(FILE,PTR,LEN) \
do { register int sp = 0, lp = 0; \
we want. This difference can be accommodated by making the assembler
define such "LDnnn" to be either "Lnnn-LInnn-2.b", "Lnnn", or any other
string, as necessary. This is accomplished via the ASM_OUTPUT_CASE_END
- macro. */
+ macro. */
#define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \
{ if (switch_table_difference_label_flag) \
/* This is (not really) BSD, so (but) it wants DBX format. */
#define DBX_DEBUGGING_INFO
-/* Brain damage. */
+/* Brain damage. */
#define SCCS_DIRECTIVE
/* Specify how to pad function arguments.
and how to find (in the caller) the value returned by a function. VALTYPE
is the data type of the value (as a tree). If the precise function being
called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0.
- For A/UX generate the result in d0, a0, or fp0 as appropriate. */
+ For A/UX generate the result in d0, a0, or fp0 as appropriate. */
#undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE, FUNC) \
/* 1 if N is a possible register number for a function value.
For A/UX allow d0, a0, or fp0 as return registers, for integral,
pointer, or floating types, respectively. Reject fp0 if not using a
- 68881 coprocessor. */
+ 68881 coprocessor. */
#undef FUNCTION_VALUE_REGNO_P
#define FUNCTION_VALUE_REGNO_P(N) \
A/UX convention is to copy the value returned for pointer functions
from a0 to d0 in the function epilogue, so that callers that have
neglected to properly declare the callee can still find the correct return
- value. */
+ value. */
#define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) \
{ \
/* Names to predefine in the preprocessor for this target machine. For the
Amiga, these definitions match those of the native AT&T compiler. Note
that we override the definition in m68kv4.h, where SVR4 is defined and
- AMIX isn't. */
+ AMIX isn't. */
#undef CPP_PREDEFINES
#define CPP_PREDEFINES \
/* This definition of ASM_OUTPUT_ASCII is the same as the one in m68k/sgs.h,
which has been overridden by the one in svr4.h. However, we can't use
the one in svr4.h because the amix assembler croaks on some of the
- strings that it emits (such as .string "\"%s\"\n"). */
+ strings that it emits (such as .string "\"%s\"\n"). */
#undef ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE,PTR,LEN) \
#endif
/* Target switches for the Apollo is the same as in m68k.h, except
- there is no Sun FPA. */
+ there is no Sun FPA. */
#undef TARGET_SWITCHES
#define TARGET_SWITCHES \
/* Specify how to pad function arguments.
Arguments are not padded at all; the stack is kept aligned on long
- boundaries. */
+ boundaries. */
#define FUNCTION_ARG_PADDING(mode, size) none
a scalar value cannot be returned in registers.
For Apollo, anything larger than one integer register is returned
using the structure-value mechanism, i.e. objects of DFmode are
- returned that way. */
+ returned that way. */
#define RETURN_IN_MEMORY(type) \
(TYPE_MODE (type) == BLKmode \
#include "m68k/m68kv4.h"
-/* Dollars and dots in labels are not allowed. */
+/* Dollars and dots in labels are not allowed. */
#define NO_DOLLAR_IN_LABEL
#define NO_DOT_IN_LABEL
/* This definition of ASM_OUTPUT_ASCII is the same as the one in m68k/sgs.h,
which has been overridden by the one in svr4.h. However, we can't use
the one in svr4.h because the ASV assembler croaks on some of the
- strings that it emits (such as .string "\"%s\"\n"). */
+ strings that it emits (such as .string "\"%s\"\n"). */
#undef ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE,PTR,LEN) \
if (block == &atexit_fns)
break;
/* I know what you are thinking -- we are about to exit, why free?
- Because it is friendly to memory leak detectors, that's why. */
+ Because it is friendly to memory leak detectors, that's why. */
old_block = block;
block = block->next;
free(old_block);
#undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (68k, GNU GAS syntax)");
-/* Discard internal local symbols beginning with 'L'. */
+/* Discard internal local symbols beginning with 'L'. */
#define LINK_SPEC "-X"
-/* Every structure or union's size must be a multiple of 4 bytes. */
+/* Every structure or union's size must be a multiple of 4 bytes. */
#define STRUCTURE_SIZE_BOUNDARY 16
/* No data type wants to be aligned rounder than this. */
#undef FUNCTION_BOUNDARY
#define FUNCTION_BOUNDARY 32
-/* Make strings long-word aligned so dhrystones will run faster. */
+/* Make strings long-word aligned so dhrystones will run faster. */
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
(TREE_CODE (EXP) == STRING_CST \
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
#define NEED_PROBE (-2048)
#endif
-/* use memcpy, memset instead of bcopy, etc. */
+/* use memcpy, memset instead of bcopy, etc. */
#define TARGET_MEM_FUNCTIONS
or print pair of registers as rx:ry.
'y' for a FPA insn (print pair of registers as rx:ry). This also outputs
CONST_DOUBLE's as SunFPA constant RAM registers if
- possible, so it should not be used except for the SunFPA. */
+ possible, so it should not be used except for the SunFPA. */
#undef PRINT_OPERAND_PUNCT_VALID_P
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
/* Define if you don't want extended real, but do want to use the
software floating point emulator for REAL_ARITHMETIC and
- decimal <-> binary conversion. */
+ decimal <-> binary conversion. */
#define REAL_ARITHMETIC
#undef ASM_OUTPUT_SOURCE_FILENAME
} \
}
-/* This is how to output a `long double' extended real constant. */
+/* This is how to output a `long double' extended real constant. */
#undef ASM_OUTPUT_LONG_DOUBLE
#define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
do { long l[3]; \
asm_fprintf (FILE, "\tdc.w %LL%d-%LL%d\n", VALUE, REL)
/* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
- keep switch tables in the text section. */
+ keep switch tables in the text section. */
#define JUMP_TABLES_IN_TEXT_SECTION 1
/* Output a float value (represented as a C double) as an immediate operand.
"%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}\
huge.o%s"
-/* Gas understands dollars in labels. */
+/* Gas understands dollars in labels. */
#undef NO_DOLLAR_IN_LABEL
/* GAS does not understand .ident so don't output anything for #ident. */
#undef ASM_OUTPUT_IDENT
/* Definitions of target machine for GNU compiler. HP-UX 68010 version. */
-/* See m68k.h. 0 means 68000 without 68881 and no bitfields. */
+/* See m68k.h. 0 means 68000 without 68881 and no bitfields. */
#define TARGET_DEFAULT 0
#include "m68k/hp320.h"
/* These definitions differ from those used for GAS by defining __HPUX_ASM__.
This is needed because some programs, particularly GDB, need to
know which assembler is being used so that the correct `asm'
- instructions can be used. */
+ instructions can be used. */
#define CPP_SPEC \
"%{!msoft-float:-D__HAVE_68881__ }\
#define STRUCTURE_SIZE_BOUNDARY 16
-/* hpux doesn't use static area for struct returns. */
+/* hpux doesn't use static area for struct returns. */
#undef PCC_STATIC_STRUCT_RETURN
/* Generate calls to memcpy, memcmp and memset. */
#endif /* not HPUX_ASM */
/* In m68k svr4, a symbol_ref rtx can be a valid PIC operand if it is an
- operand of a function call. */
+ operand of a function call. */
#undef LEGITIMATE_PIC_OPERAND_P
#define LEGITIMATE_PIC_OPERAND_P(X) \
((! symbolic_operand (X, VOIDmode) \
#include "m68k/m68k.h"
-/* See m68k.h. 7 means 68020 with 68881. */
+/* See m68k.h. 7 means 68020 with 68881. */
#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_BITFIELD|MASK_68881|MASK_68020)
#endif
/* TODO: convert includes to ${tm_file} list in config.gcc. */
#include <m68k/m68k.h>
-/* Make sure CC1 is undefined. */
+/* Make sure CC1 is undefined. */
#undef CC1_SPEC
#include "elfos.h"
#define REGISTER_PREFIX "%"
/* The prefix for local (compiler generated) labels.
- These labels will not appear in the symbol table. */
+ These labels will not appear in the symbol table. */
#undef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX "."
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols. */
#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX ""
/* How to refer to registers in assembler output.
This sequence is indexed by compiler's hard-register-number.
- Motorola format uses different register names than defined in m68k.h. */
+ Motorola format uses different register names than defined in m68k.h. */
#undef REGISTER_NAMES
When the -shared link option is used a final link is not being
done. */
-/* If ELF is the default format, we should not use /lib/elf. */
+/* If ELF is the default format, we should not use /lib/elf. */
#undef LINK_SPEC
#ifdef USE_GNULIBC_1
function. VALTYPE is the data type of the value (as a tree). If
the precise function being called is known, FUNC is its
FUNCTION_DECL; otherwise, FUNC is 0. For m68k/SVR4 generate the
- result in d0, a0, or fp0 as appropriate. */
+ result in d0, a0, or fp0 as appropriate. */
#undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE, FUNC) \
: gen_rtx_REG ((MODE), 0))
/* In m68k svr4, a symbol_ref rtx can be a valid PIC operand if it is
- an operand of a function call. */
+ an operand of a function call. */
#undef LEGITIMATE_PIC_OPERAND_P
#define LEGITIMATE_PIC_OPERAND_P(X) \
((! symbolic_operand (X, VOIDmode) \
if (flag_pic) flag_no_function_cse = 1;
/* For m68k SVR4, structures are returned using the reentrant
- technique. */
+ technique. */
#undef PCC_STATIC_STRUCT_RETURN
#define DEFAULT_PCC_STRUCT_RETURN 0
#define STRUCTURE_SIZE_BOUNDARY 16
-/* Lynx uses d2 and d3 as scratch registers. */
+/* Lynx uses d2 and d3 as scratch registers. */
#undef CALL_USED_REGISTERS
#define CALL_USED_REGISTERS \
{1, 1, 1, 1, 0, 0, 0, 0, \
#define MOTOROLA
-/* Get generic m68k definitions. */
+/* Get generic m68k definitions. */
#include "m68k/m68k.h"
#include "m68k/m68kemb.h"
/* Default processor type is a (pure) 68040 with 68881 emulation using
- the floating-point support package. */
+ the floating-point support package. */
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_68040_ONLY|MASK_BITFIELD|MASK_68881|MASK_68020)
/* Options passed to CPP, GAS, CC1 and CC1PLUS. We override
- m68k-none.h for consistency with TARGET_DEFAULT. */
+ m68k-none.h for consistency with TARGET_DEFAULT. */
#undef CPP_SPEC
#define CPP_SPEC \
"%{m68000:%{!m68881:-msoft-float }}%{m68302:-m68000}%{m68332:-m68020 -mnobitfield %{!m68881:-msoft-float}}%{!m68000:%{!mc68000:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68302:%{!m68332:-m68040}}}}}}}}}}"
-/* Get processor-independent pSOS definitions. */
+/* Get processor-independent pSOS definitions. */
#include "psos.h"
\f
/* Alignment to use for loops and jumps */
-/* Specify power of two alignment used for loops. */
+/* Specify power of two alignment used for loops. */
const char *m68k_align_loops_string;
-/* Specify power of two alignment used for non-loop jumps. */
+/* Specify power of two alignment used for non-loop jumps. */
const char *m68k_align_jumps_string;
-/* Specify power of two alignment used for functions. */
+/* Specify power of two alignment used for functions. */
const char *m68k_align_funcs_string;
-/* Specify power of two alignment used for loops. */
+/* Specify power of two alignment used for loops. */
int m68k_align_loops;
-/* Specify power of two alignment used for non-loop jumps. */
+/* Specify power of two alignment used for non-loop jumps. */
int m68k_align_jumps;
-/* Specify power of two alignment used for functions. */
+/* Specify power of two alignment used for functions. */
int m68k_align_funcs;
/* Nonzero if the last compare/test insn had FP operands. The
int i;
- /* Undo the work from above. */
+ /* Undo the work from above. */
for (i = 0; i< 16; i++)
if (mask & (1 << i))
fprintf (stream, "\tmove.l %s,-(sp)\n", reg_names[15 - i]);
{
if (!TARGET_5200)
{
- /* asm_fprintf() cannot handle %. */
+ /* asm_fprintf() cannot handle %. */
#ifdef MOTOROLA
asm_fprintf (stream, "\tsubq.w %0I%d,%Rsp\n", fsize + 4);
#else
}
else
{
- /* asm_fprintf() cannot handle %. */
+ /* asm_fprintf() cannot handle %. */
#ifdef MOTOROLA
asm_fprintf (stream, "\tsubq.l %0I%d,%Rsp\n", fsize + 4);
#else
else if (fsize + 4 <= 16 && TARGET_CPU32)
{
/* On the CPU32 it is faster to use two subqw instructions to
- subtract a small integer (8 < N <= 16) to a register. */
- /* asm_fprintf() cannot handle %. */
+ subtract a small integer (8 < N <= 16) to a register. */
+ /* asm_fprintf() cannot handle %. */
#ifdef MOTOROLA
asm_fprintf (stream, "\tsubq.w %0I8,%Rsp\n\tsubq.w %0I%d,%Rsp\n",
fsize + 4 - 8);
if (TARGET_68040)
{
/* Adding negative number is faster on the 68040. */
- /* asm_fprintf() cannot handle %. */
+ /* asm_fprintf() cannot handle %. */
#ifdef MOTOROLA
asm_fprintf (stream, "\tadd.w %0I%d,%Rsp\n", - (fsize + 4));
#else
}
else
{
- /* asm_fprintf() cannot handle %. */
+ /* asm_fprintf() cannot handle %. */
#ifdef MOTOROLA
asm_fprintf (stream, "\tadd.l %0I%d,%Rsp\n", - (fsize + 4));
#else
int i;
- /* Undo the work from above. */
+ /* Undo the work from above. */
for (i = 0; i< 16; i++)
if (mask & (1 << i))
{
/* Restore each separately in the same order moveml does.
Using two movel instructions instead of a single moveml
is about 15% faster for the 68020 and 68030 at no expense
- in code size. */
+ in code size. */
int i;
- /* Undo the work from above. */
+ /* Undo the work from above. */
for (i = 0; i< 16; i++)
if (mask & (1 << i))
{
offset = foffset + nregs * 4;
/* FIXME : leaf_function_p below is too strong.
What we really need to know there is if there could be pending
- stack adjustment needed at that point. */
+ stack adjustment needed at that point. */
restore_from_sp = ! frame_pointer_needed
|| (! current_function_calls_alloca && leaf_function_p ());
if (offset + fsize >= 0x8000
/* Restore each separately in the same order moveml does.
Using two movel instructions instead of a single moveml
is about 15% faster for the 68020 and 68030 at no expense
- in code size. */
+ in code size. */
int i;
- /* Undo the work from above. */
+ /* Undo the work from above. */
for (i = 0; i< 16; i++)
if (mask & (1 << i))
{
else if (fsize + 4 <= 16 && TARGET_CPU32)
{
/* On the CPU32 it is faster to use two addqw instructions to
- add a small integer (8 < N <= 16) to a register. */
- /* asm_fprintf() cannot handle %. */
+ add a small integer (8 < N <= 16) to a register. */
+ /* asm_fprintf() cannot handle %. */
#ifdef MOTOROLA
asm_fprintf (stream, "\taddq.w %0I8,%Rsp\n\taddq.w %0I%d,%Rsp\n",
fsize + 4 - 8);
{
if (TARGET_68040)
{
- /* asm_fprintf() cannot handle %. */
+ /* asm_fprintf() cannot handle %. */
#ifdef MOTOROLA
asm_fprintf (stream, "\tadd.w %0I%d,%Rsp\n", fsize + 4);
#else
}
else
{
- /* asm_fprintf() cannot handle %. */
+ /* asm_fprintf() cannot handle %. */
#ifdef MOTOROLA
asm_fprintf (stream, "\tadd.l %0I%d,%Rsp\n", fsize + 4);
#else
}
/* If the decrement is to be done in SImode, then we have
- to compensate for the fact that dbcc decrements in HImode. */
+ to compensate for the fact that dbcc decrements in HImode. */
switch (GET_MODE (operands[0]))
{
case SImode:
}
}
\f
-/* Check for sign_extend or zero_extend. Used for bit-count operands. */
+/* Check for sign_extend or zero_extend. Used for bit-count operands. */
int
extend_operator(x, mode)
if (USE_MOVQ (i))
return MOVQ;
- /* The Coldfire doesn't have byte or word operations. */
+ /* The Coldfire doesn't have byte or word operations. */
/* FIXME: This may not be useful for the m68060 either */
if (!TARGET_5200)
{
/* if -256 < N < 256 but N is not in range for a moveq
- N^ff will be, so use moveq #N^ff, dreg; not.b dreg. */
+ N^ff will be, so use moveq #N^ff, dreg; not.b dreg. */
if (USE_MOVQ (i ^ 0xff))
return NOTB;
/* Likewise, try with not.w */
if (addreg0 || addreg1)
abort ();
- /* Only the middle reg conflicts; simply put it last. */
+ /* Only the middle reg conflicts; simply put it last. */
output_asm_insn (singlemove_string (operands), operands);
output_asm_insn (singlemove_string (latehalf), latehalf);
output_asm_insn (singlemove_string (middlehalf), middlehalf);
}
/* On the CPU32 it is faster to use two addql instructions to
add a small integer (8 < N <= 16) to a register.
- Likewise for subql. */
+ Likewise for subql. */
if (TARGET_CPU32 && REG_P (operands[0]))
{
if (INTVAL (operands[2]) > 8
/* (SET r1 (ZERO_EXTEND r2)) on this machine
ends with a move insn moving r2 in r2's mode.
Thus, the cc's are set for r2.
- This can set N bit spuriously. */
+ This can set N bit spuriously. */
cc_status.flags |= CC_NOT_NEGATIVE;
default:
The value, anded with 0xff, gives the code to use in fmovecr
to get the desired constant. */
-/* This code has been fixed for cross-compilation. */
+/* This code has been fixed for cross-compilation. */
static int inited_68881_table = 0;
REAL_VALUE_TYPE values_68881[7];
/* Set up values_68881 array by converting the decimal values
- strings_68881 to binary. */
+ strings_68881 to binary. */
void
init_68881_table ()
#endif
/* fmovecr must be emulated on the 68040 and 68060, so it shouldn't be
- used at all on those chips. */
+ used at all on those chips. */
if (TARGET_68040 || TARGET_68060)
return 0;
/* Return nonzero if X, a CONST_DOUBLE, has a value that we can get
from the Sun FPA's constant RAM.
The value returned, anded with 0x1ff, gives the code to use in fpmove
- to get the desired constant. */
+ to get the desired constant. */
static int inited_FPA_table = 0;
REAL_VALUE_TYPE values_FPA[38];
-/* This code has been fixed for cross-compilation. */
+/* This code has been fixed for cross-compilation. */
void
init_FPA_table ()
{
#ifdef MOTOROLA
#ifdef SGS
- /* Many SGS assemblers croak on size specifiers for constants. */
+ /* Many SGS assemblers croak on size specifiers for constants. */
fprintf (file, "%d", (int) INTVAL (addr));
#else
fprintf (file, "%d.w", (int) INTVAL (addr));
The 68040 will execute all 68030 and 68881/2 instructions, but some
of them must be emulated in software by the OS. When TARGET_68040 is
turned on, these instructions won't be used. This code will still
- run on a 68030 and 68881/2. */
+ run on a 68030 and 68881/2. */
#define MASK_68040 256
#define TARGET_68040 (target_flags & MASK_68040)
The 68060 will execute all 68030 and 68881/2 instructions, but some
of them must be emulated in software by the OS. When TARGET_68060 is
turned on, these instructions won't be used. This code will still
- run on a 68030 and 68881/2. */
+ run on a 68030 and 68881/2. */
#define MASK_68060 1024
#define TARGET_68060 (target_flags & MASK_68060)
#define MASK_PCREL 8192
#define TARGET_PCREL (target_flags & MASK_PCREL)
-/* Relax strict alignment. */
+/* Relax strict alignment. */
#define MASK_NO_STRICT_ALIGNMENT 16384
#define TARGET_STRICT_ALIGNMENT (~target_flags & MASK_NO_STRICT_ALIGNMENT)
/* Define if you don't want extended real, but do want to use the
software floating point emulator for REAL_ARITHMETIC and
- decimal <-> binary conversion. */
+ decimal <-> binary conversion. */
/* #define REAL_ARITHMETIC */
/* Define this if most significant bit is lowest numbered
Most published ABIs say that ints should be aligned on 16 bit
boundaries, but cpus with 32 bit busses get better performance
aligned on 32 bit boundaries. Coldfires without a misalignment
- module require 32 bit alignment. */
+ module require 32 bit alignment. */
#define BIGGEST_ALIGNMENT (TARGET_ALIGN_INT ? 32 : 16)
/* Set this nonzero if move instructions will actually fail to work
/* Align loop starts for optimal branching. */
#define LOOP_ALIGN(LABEL) (m68k_align_loops)
-/* This is how to align an instruction for optimal branching. */
+/* This is how to align an instruction for optimal branching. */
#define LABEL_ALIGN_AFTER_BARRIER(LABEL) (m68k_align_jumps)
#define SELECT_RTX_SECTION(MODE, X, ALIGN) \
#define FIRST_PSEUDO_REGISTER 56
#endif
-/* This defines the register which is used to hold the offset table for PIC. */
+/* This defines the register which is used to hold the offset table for PIC. */
#define PIC_OFFSET_TABLE_REGNUM 13
#ifndef SUPPORT_SUN_FPA
On the 68000, only the stack pointer is such. */
/* fpa0 is also reserved so that it can be used to move data back and
- forth between high fpa regs and everything else. */
+ forth between high fpa regs and everything else. */
#define FIXED_REGISTERS \
{/* Data registers. */ \
#define N_REG_CLASSES (int) LIM_REG_CLASSES
-/* Give names of register classes as strings for dump file. */
+/* Give names of register classes as strings for dump file. */
#define REG_CLASS_NAMES \
{ "NO_REGS", "DATA_REGS", \
#define N_REG_CLASSES (int) LIM_REG_CLASSES
-/* Give names of register classes as strings for dump file. */
+/* Give names of register classes as strings for dump file. */
#define REG_CLASS_NAMES \
{ "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \
machine description; we zorch the constraint letters that aren't
appropriate for a specific target. This allows us to guarantee
that a specific kind of register will not be used for a given target
- without fiddling with the register classes above. */
+ without fiddling with the register classes above. */
#ifndef SUPPORT_SUN_FPA
On the 5200 (coldfire), sp@- in a byte insn pushes just a byte. */
#define PUSH_ROUNDING(BYTES) (TARGET_5200 ? BYTES : ((BYTES) + 1) & ~1)
-/* We want to avoid trying to push bytes. */
+/* We want to avoid trying to push bytes. */
#define MOVE_BY_PIECES_P(SIZE, ALIGN) \
(move_by_pieces_ninsns (SIZE, ALIGN) < MOVE_RATIO \
&& (((SIZE) >=16 && (ALIGN) >= 16) || (TARGET_5200)))
while(0)
/* Output assembler code to FILE to indicate return from
- a function during basic block profiling. */
+ a function during basic block profiling. */
#define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
asm_fprintf (FILE, "\tjsr %U__bb_trace_ret\n");
#endif /* __mcf5200__ */
#endif /* MOTOROLA */
-/* Restore all registers saved by MACHINE_STATE_SAVE. */
+/* Restore all registers saved by MACHINE_STATE_SAVE. */
#ifdef MOTOROLA
#if defined(__mcf5200__)
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
- Do not define this if the table should contain absolute addresses. */
+ Do not define this if the table should contain absolute addresses. */
#define CASE_VECTOR_PC_RELATIVE 1
/* Specify the tree operation to be used to convert reals to integers. */
an empty string, or any arbitrary string (such as ".", ".L%", etc)
without having to make any other changes to account for the specific
definition. Note it is a string literal, not interpreted by printf
- and friends. */
+ and friends. */
#define LOCAL_LABEL_PREFIX ""
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
-/* This is how to output a `long double' extended real constant. */
+/* This is how to output a `long double' extended real constant. */
#define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
do { long l[3]; \
or print pair of registers as rx:ry.
'y' for a FPA insn (print pair of registers as rx:ry). This also outputs
CONST_DOUBLE's as SunFPA constant RAM registers if
- possible, so it should not be used except for the SunFPA. */
+ possible, so it should not be used except for the SunFPA. */
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
{
#ifdef MOTOROLA
#ifdef SGS
- /* Many SGS assemblers croak on size specifiers for constants. */
+ /* Many SGS assemblers croak on size specifiers for constants. */
return \"lea 0,%0\";
#else
return \"lea 0.w,%0\";
{
#ifdef MOTOROLA
#ifdef SGS
- /* Many SGS assemblers croak on size specifiers for constants. */
+ /* Many SGS assemblers croak on size specifiers for constants. */
return \"lea 0,%0\";
#else
return \"lea 0.w,%0\";
}
/* On the CPU32 it is faster to use two addqw instructions to
add a small integer (8 < N <= 16) to a register.
- Likewise for subqw. */
+ Likewise for subqw. */
if (TARGET_CPU32 && REG_P (operands[0]))
{
if (INTVAL (operands[2]) > 8
}
/* On the CPU32 it is faster to use two addqw instructions to
add a small integer (8 < N <= 16) to a register.
- Likewise for subqw. */
+ Likewise for subqw. */
if (TARGET_CPU32 && REG_P (operands[0]))
{
if (INTVAL (operands[1]) > 8
}
/* On the CPU32 it is faster to use two addqw instructions to
add a small integer (8 < N <= 16) to a register.
- Likewise for subqw. */
+ Likewise for subqw. */
if (TARGET_CPU32 && REG_P (operands[0]))
{
if (INTVAL (operands[1]) > 8
"*
{
CC_STATUS_INIT;
- /* We can get CONST_DOUBLE, but also const1_rtx etc. */
+ /* We can get CONST_DOUBLE, but also const1_rtx etc. */
if (CONSTANT_P (operands[2]))
{
rtx hi, lo;
"*
{
CC_STATUS_INIT;
- /* We can get CONST_DOUBLE, but also const1_rtx etc. */
+ /* We can get CONST_DOUBLE, but also const1_rtx etc. */
if (CONSTANT_P (operands[2]))
{
rtx hi, lo;
"*
{
CC_STATUS_INIT;
- /* We can get CONST_DOUBLE, but also const1_rtx etc. */
+ /* We can get CONST_DOUBLE, but also const1_rtx etc. */
if (CONSTANT_P (operands[2]))
{
#define REGISTER_PREFIX "%"
/* The prefix for local (compiler generated) labels.
- These labels will not appear in the symbol table. */
+ These labels will not appear in the symbol table. */
#undef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX "."
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols. */
#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX ""
g++ assembler names. When this is defined, g++ uses embedded '.'
characters and some m68k assemblers have problems with this. The
chances are much greater that any particular assembler will permit
- embedded '$' characters. */
+ embedded '$' characters. */
#undef NO_DOLLAR_IN_LABEL
#define BSS_ASM_OP "\t.lcomm\t"
/* Register in which address to store a structure value is passed to a
- function. The default in m68k.h is a1. For m68k/SVR4 it is a0. */
+ function. The default in m68k.h is a1. For m68k/SVR4 it is a0. */
#undef STRUCT_VALUE_REGNUM
#define STRUCT_VALUE_REGNUM 8
/* Define how the m68k registers should be numbered for Dwarf output.
The numbering provided here should be compatible with the native
SVR4 SDB debugger in the m68k/SVR4 reference port, where d0-d7
- are 0-7, a0-a8 are 8-15, and fp0-fp7 are 16-23. */
+ are 0-7, a0-a8 are 8-15, and fp0-fp7 are 16-23. */
#undef DBX_REGISTER_NUMBER
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
It is then overridden by m68k/sgs.h to use ".space", and again by svr4.h
to use ".zero". The m68k/SVR4 assembler uses ".space", so repeat the
definition from m68k/sgs.h here. Note that ASM_NO_SKIP_IN_TEXT is
- defined in m68k/sgs.h, so we don't have to repeat it here. */
+ defined in m68k/sgs.h, so we don't have to repeat it here. */
#undef ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
#if 0
/* SVR4 m68k assembler is bitching on the `comm i,1,1' which askes for
1 byte alignment. Don't generate alignment for COMMON seems to be
- safer until we the assembler is fixed. */
+ safer until we the assembler is fixed. */
#undef ASM_OUTPUT_ALIGNED_COMMON
/* Same problem with this one. */
#undef ASM_OUTPUT_ALIGNED_LOCAL
/* The `string' directive on m68k svr4 does not handle string with
escape char (ie., `\') right. Use normal way to output ASCII bytes
- seems to be safer. */
+ seems to be safer. */
#undef ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE,PTR,LEN) \
do { \
fprintf ((FILE), ",%u\n", (SIZE)))
/* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
- keep switch tables in the text section. */
+ keep switch tables in the text section. */
#define JUMP_TABLES_IN_TEXT_SECTION 1
/* Override the definition in svr4.h. In m68k svr4, using swbeg is the
- standard way to do switch table. */
+ standard way to do switch table. */
#undef ASM_OUTPUT_BEFORE_CASE_LABEL
#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
fprintf ((FILE), "%s&%d\n", SWBEG_ASM_OP, XVECLEN (PATTERN (TABLE), 1));
/* In m68k svr4, a symbol_ref rtx can be a valid PIC operand if it is an
- operand of a function call. */
+ operand of a function call. */
#undef LEGITIMATE_PIC_OPERAND_P
#define LEGITIMATE_PIC_OPERAND_P(X) \
to be done as `bsr foo@PLTPC', so it will force the assembler to create
the PLT entry for `foo'. Doing function cse will cause the address of `foo'
to be loaded into a register, which is exactly what we want to avoid when
- we are doing PIC on svr4 m68k. */
+ we are doing PIC on svr4 m68k. */
#undef OVERRIDE_OPTIONS
#define OVERRIDE_OPTIONS \
{ \
specified as the number of bits.
Try to use function `asm_output_aligned_bss' defined in file
- `varasm.c' when defining this macro. */
+ `varasm.c' when defining this macro. */
#ifndef ASM_OUTPUT_ALIGNED_BSS
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
g++ assembler names. When this is defined, g++ uses embedded '.'
characters and some m68k assemblers have problems with this. The
chances are much greater that any particular assembler will permit
- embedded '$' characters. */
+ embedded '$' characters. */
#undef NO_DOLLAR_IN_LABEL
If a 68881 is the default, gcc will use inline 68881 instructions, by
predefining __HAVE_68881__, unless -msoft-float is specified.
If a 68881 is not the default, gcc will only define __HAVE_68881__ if
- -m68881 is specified. */
+ -m68881 is specified. */
#if TARGET_DEFAULT & MASK_68881
#define CPP_SPEC "%{!msoft-float:-D__HAVE_68881__}"
for profiling a function entry. We override the definition in m68k.h
and match the way the native m68k/SVR4 compiler does profiling, with the
address of the profile counter in a1, not a0, and using bsr rather
- than jsr. */
+ than jsr. */
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(FILE, LABELNO) \
#define BSS_ASM_OP "\t.lcomm\t"
/* Register in which address to store a structure value is passed to a
- function. The default in m68k.h is a1. For m68k/SVR4 it is a0. */
+ function. The default in m68k.h is a1. For m68k/SVR4 it is a0. */
#undef STRUCT_VALUE_REGNUM
#define STRUCT_VALUE_REGNUM 8
/* Define how the m68k registers should be numbered for Dwarf output.
The numbering provided here should be compatible with the native
SVR4 SDB debugger in the m68k/SVR4 reference port, where d0-d7
- are 0-7, a0-a8 are 8-15, and fp0-fp7 are 16-23. */
+ are 0-7, a0-a8 are 8-15, and fp0-fp7 are 16-23. */
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
It is then overridden by m68k/sgs.h to use ".space", and again by svr4.h
to use ".zero". The m68k/SVR4 assembler uses ".space", so repeat the
definition from m68k/sgs.h here. Note that ASM_NO_SKIP_IN_TEXT is
- defined in m68k/sgs.h, so we don't have to repeat it here. */
+ defined in m68k/sgs.h, so we don't have to repeat it here. */
#undef ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
/* 1 if N is a possible register number for a function value.
For m68k/SVR4 allow d0, a0, or fp0 as return registers, for integral,
pointer, or floating types, respectively. Reject fp0 if not using a
- 68881 coprocessor. */
+ 68881 coprocessor. */
#undef FUNCTION_VALUE_REGNO_P
#define FUNCTION_VALUE_REGNO_P(N) \
and how to find (in the caller) the value returned by a function. VALTYPE
is the data type of the value (as a tree). If the precise function being
called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0.
- For m68k/SVR4 generate the result in d0, a0, or fp0 as appropriate. */
+ For m68k/SVR4 generate the result in d0, a0, or fp0 as appropriate. */
#undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE, FUNC) \
m68k/SVR4 convention is to copy the value returned for pointer functions
from a0 to d0 in the function epilogue, so that callers that have
neglected to properly declare the callee can still find the correct return
- value. */
+ value. */
#define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) \
do { \
/* Define how to find the value returned by a library function assuming the
value has mode MODE.
For m68k/SVR4 look for integer values in d0, pointer values in d0
- (returned in both d0 and a0), and floating values in fp0. */
+ (returned in both d0 and a0), and floating values in fp0. */
#undef LIBCALL_VALUE
#define LIBCALL_VALUE(MODE) \
: gen_rtx_REG ((MODE), 0))
/* Boundary (in *bits*) on which stack pointer should be aligned.
- The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
+ The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
#undef STACK_BOUNDARY
#define STACK_BOUNDARY 32
/* Alignment of field after `int : 0' in a structure.
- For m68k/SVR4, this is the next longword boundary. */
+ For m68k/SVR4, this is the next longword boundary. */
#undef EMPTY_FIELD_BOUNDARY
#define EMPTY_FIELD_BOUNDARY 32
/* SVR4 m68k assembler is bitching on the `comm i,1,1' which asks for
1 byte alignment. Don't generate alignment for COMMON seems to be
- safer until we the assembler is fixed. */
+ safer until we the assembler is fixed. */
#undef ASM_OUTPUT_ALIGNED_COMMON
/* Same problem with this one. */
#undef ASM_OUTPUT_ALIGNED_LOCAL
/* The `string' directive on m68k svr4 does not handle string with
escape char (ie., `\') right. Use normal way to output ASCII bytes
- seems to be safer. */
+ seems to be safer. */
#undef ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE,PTR,LEN) \
do { \
fprintf ((FILE), ",%u\n", (SIZE)))
/* Override the definition in svr4.h. In m68k svr4, using swbeg is the
- standard way to do switch table. */
+ standard way to do switch table. */
#undef ASM_OUTPUT_BEFORE_CASE_LABEL
#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
fprintf ((FILE), "%s&%d\n", SWBEG_ASM_OP, XVECLEN (PATTERN (TABLE), 1));
/* In m68k svr4, a symbol_ref rtx can be a valid PIC operand if it is an
- operand of a function call. */
+ operand of a function call. */
#undef LEGITIMATE_PIC_OPERAND_P
#define LEGITIMATE_PIC_OPERAND_P(X) \
((! symbolic_operand (X, VOIDmode) \
to be done as `bsr foo@PLTPC', so it will force the assembler to create
the PLT entry for `foo'. Doing function cse will cause the address of `foo'
to be loaded into a register, which is exactly what we want to avoid when
- we are doing PIC on svr4 m68k. */
+ we are doing PIC on svr4 m68k. */
#undef OVERRIDE_OPTIONS
#define OVERRIDE_OPTIONS \
{ \
#define DEFAULT_PCC_STRUCT_RETURN 0
/* If TARGET_68881, return SF and DF values in fp0 instead of d0. */
-/* NYI: If FP=M68881U return SF and DF values in d0. */
+/* NYI: If FP=M68881U return SF and DF values in d0. */
/* NYI: If -mold return pointer in a0 and d0 */
#undef FUNCTION_VALUE
-/* sysV68 (brain damaged) cc convention support. */
+/* sysV68 (brain damaged) cc convention support. */
#define FUNCTION_VALUE(VALTYPE,FUNC) \
(TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \
? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
d0 may be used, and fp0 as well if -msoft-float is not specified. */
#undef FUNCTION_VALUE_REGNO_P
-/* sysV68 (brain damaged) cc convention support. */
+/* sysV68 (brain damaged) cc convention support. */
#define FUNCTION_VALUE_REGNO_P(N) \
((N) == 0 || (N) == 8 || (TARGET_68881 && (N) == 16))
/* The beginnings of sdb support... */
/* Undefining these will allow `output_file_directive' (in toplev.c)
- to default to the right thing. */
+ to default to the right thing. */
#undef ASM_OUTPUT_MAIN_SOURCE_FILENAME
#ifndef USE_GAS
#define ASM_OUTPUT_SOURCE_FILENAME(FILE, FILENAME) \
#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
asm_fprintf (FILE, "%L%s%d:\n", PREFIX, NUM)
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols. */
#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX ""
tell g++.c about that. */
#define ALT_LIBM "-lm881"
-#if (TARGET_DEFAULT & MASK_68881) /* The default configuration has a 6888[12] FPU. */
+#if (TARGET_DEFAULT & MASK_68881) /* The default configuration has a 6888[12] FPU. */
#define MATH_LIBRARY "-lm881"
#endif
_cleanup (); \
} while (0)
-/* FINALIZE_TRAMPOLINE clears the instruction cache. */
+/* FINALIZE_TRAMPOLINE clears the instruction cache. */
#undef FINALIZE_TRAMPOLINE
#define FINALIZE_TRAMPOLINE(TRAMP) \
#if 0
/* The NEWS assembler in version 3.4 complains about fmove.d, but this
- macro proved not to work right. 3.4 is old, so forget about it. */
+ macro proved not to work right. 3.4 is old, so forget about it. */
#define ASM_OUTPUT_OPCODE(FILE, STRING) \
{ \
if (!strncmp (STRING, "fmove.d", 7) \
tables using pc relative addressing, since they are not in the text
section, so we undefine CASE_VECTOR_PC_RELATIVE. This also
causes the compiler to use absolute addresses in the jump table,
- so we redefine CASE_VECTOR_MODE to be SImode. */
+ so we redefine CASE_VECTOR_MODE to be SImode. */
#undef CASE_VECTOR_MODE
#define CASE_VECTOR_MODE SImode
#define GO_IF_INDEXABLE_BASE(X, ADDR) \
{ if (LEGITIMATE_BASE_REG_P (X)) goto ADDR; }
-/* This accounts for the return pc and saved fp on the m68k. */
+/* This accounts for the return pc and saved fp on the m68k. */
#define OBJC_FORWARDING_STACK_OFFSET 8
#define OBJC_FORWARDING_MIN_OFFSET 8
/* FINALIZE_TRAMPOLINE enables executable stack. The
- __enable_execute_stack also clears the insn cache. */
+ __enable_execute_stack also clears the insn cache. */
#undef FINALIZE_TRAMPOLINE
#define FINALIZE_TRAMPOLINE(TRAMP) \
0, VOIDmode, 1, memory_address (SImode, (TRAMP)), Pmode)
/* A C expression used to clear the instruction cache from
- address BEG to address END. On NeXTSTEP this i a system trap. */
+ address BEG to address END. On NeXTSTEP this i a system trap. */
#define CLEAR_INSN_CACHE(BEG, END) \
asm volatile ("trap #2")
#define TARGET_MEM_FUNCTIONS
-/* -m68000 requires special flags to the assembler. */
+/* -m68000 requires special flags to the assembler. */
#define ASM_SPEC \
" %{m68000:-mc68010}%{mc68000:-mc68010}"
/* similar to default, but allows for the table defined by ld with gcc.ifile.
nptrs is always 0. So we need to instead check that __DTOR_LIST__[1] != 0.
The old check is left in so that the same macro can be used if and when
- a future version of gas does support section directives. */
+ a future version of gas does support section directives. */
#define DO_GLOBAL_DTORS_BODY {int nptrs = *(int *)__DTOR_LIST__; int i; \
if (nptrs == -1 || (__DTOR_LIST__[0] == 0 && __DTOR_LIST__[1] != 0)) \
#include "m68k/m68k.h"
/* Define __HAVE_68881 in preprocessor only if -m68881 is specified.
- This will control the use of inline 68881 insns in certain macros. */
+ This will control the use of inline 68881 insns in certain macros. */
#define TARGET_DEFAULT (MASK_BITFIELD|MASK_68020)
#include "m68k/m68k.h"
-/* SGS specific assembler pseudo ops. */
+/* SGS specific assembler pseudo ops. */
#define BYTE_ASM_OP "\t.byte "
#define WORD_ASM_OP "\t.short "
#define REGISTER_PREFIX "%"
/* The prefix for local (compiler generated) labels.
- These labels will not appear in the symbol table. */
+ These labels will not appear in the symbol table. */
#undef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX "."
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols. */
#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX ""
#endif /* defined SUPPORT_SUN_FPA */
/* This is how to output an assembler line defining an `int' constant. */
-/* The SGS assembler doesn't understand ".word". */
+/* The SGS assembler doesn't understand ".word". */
#undef ASM_OUTPUT_SHORT
#define ASM_OUTPUT_SHORT(FILE,VALUE) \
1023 bytes. There is no "partial string op" which works like ".string"
but doesn't append a null byte, so we can't chop the input string up
into small pieces and use that. Our only remaining alternative is to
- output the string one byte at a time. */
+ output the string one byte at a time. */
#define ASM_OUTPUT_ASCII(FILE,PTR,LEN) \
do { \
/* SGS based assemblers don't understand #NO_APP and #APP, so just don't
- bother emitting them. */
+ bother emitting them. */
#undef ASM_APP_ON
#define ASM_APP_ON ""
/* How to output a block of SIZE zero bytes. Note that the `space' pseudo,
when used in the text segment, causes SGS assemblers to output nop insns
- rather than 0s, so we set ASM_NO_SKIP_IN_TEXT to prevent this. */
+ rather than 0s, so we set ASM_NO_SKIP_IN_TEXT to prevent this. */
#define ASM_NO_SKIP_IN_TEXT 1
/* This macro outputs the label at the start of a switch table. The
".swbeg <N>" is an assembler directive that causes the switch table
size to be inserted into the object code so that disassemblers, for
- example, can identify that it is the start of a switch table. */
+ example, can identify that it is the start of a switch table. */
#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
fprintf ((FILE), "%s&%d\n", SWBEG_ASM_OP, XVECLEN (PATTERN (TABLE), 1));
we want. This difference can be accommodated by making the assembler
define such "LDnnn" to be either "Lnnn-LInnn-2.b", "Lnnn", or any other
string, as necessary. This is accomplished via the ASM_OUTPUT_CASE_END
- macro. */
+ macro. */
#undef ASM_OUTPUT_CASE_END
#define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \
asm_fprintf (FILE, "%s%LL%d-%LL%d\n", WORD_ASM_OP, VALUE, REL)
/* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
- keep switch tables in the text section. */
+ keep switch tables in the text section. */
#define JUMP_TABLES_IN_TEXT_SECTION 1
#if 0
/* This was turned off as it caused linking errors on sunos4.1.
`gcc -a' links in /usr/lib/bb_link.o which does not provide __bb_link
- but its own version of __bb_init_func. */
+ but its own version of __bb_init_func. */
#undef BLOCK_PROFILER_CODE
#define BLOCK_PROFILER_CODE \
extern int ___tcov_init; \
#undef IMMEDIATE_PREFIX
#define IMMEDIATE_PREFIX "&"
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols. */
/* We do not want leading underscores. */
#define LIB_SPEC ""
-/* Provide required defaults for linker. */
+/* Provide required defaults for linker. */
#define LINK_SPEC "-r"
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