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Missing close bracket
author
Eddie Hung
<eddie@fpgeh.com>
Sat, 15 Jun 2019 16:10:01 +0000
(09:10 -0700)
committer
Eddie Hung
<eddie@fpgeh.com>
Sat, 15 Jun 2019 16:10:01 +0000
(09:10 -0700)
frontends/aiger/aigerparse.cc
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diff --git
a/frontends/aiger/aigerparse.cc
b/frontends/aiger/aigerparse.cc
index 281e1cc9de67ff1189ad2bcb13658466e830ddc8..d0d2ffdbac7aba31884cc93a32b86e0db5aaaed7 100644
(file)
--- a/
frontends/aiger/aigerparse.cc
+++ b/
frontends/aiger/aigerparse.cc
@@
-1025,7
+1025,7
@@
struct AigerFrontend : public Frontend {
log(" Name of module to be created (default: <filename>)\n");
log("\n");
log(" -clk_name <wire_name>\n");
- log(" If specified, AIGER latches to be transformed into $_DFF_P_ cells\n"
+ log(" If specified, AIGER latches to be transformed into $_DFF_P_ cells\n"
);
log(" clocked by wire of this name. Otherwise, $_FF_ cells will be used.\n");
log("\n");
log(" -map <filename>\n");