[sim,xcc] change cond. mov inst format, add implementation

diff --git a/riscv/insns/fmovn.h b/riscv/insns/fmovn.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..394b56cfde69866ee4811bacfd4f5253c84cbd37 100644 (file)
--- a/riscv/insns/fmovn.h
+++ b/riscv/insns/fmovn.h
@@ -0,0 +1,2 @@
+require_vector;
+if (RS1 & 0x1) FRD = FRS2;

diff --git a/riscv/insns/fmovz.h b/riscv/insns/fmovz.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..7862216aa958725456a337d15e84d6c70aaacb78 100644 (file)
--- a/riscv/insns/fmovz.h
+++ b/riscv/insns/fmovz.h
@@ -0,0 +1,2 @@
+require_vector;
+if (~RS1 & 0x1) FRD = FRS2;

diff --git a/riscv/insns/movn.h b/riscv/insns/movn.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..402d6d34cb441d9968fe93baefc1805d10719ec4 100644 (file)
--- a/riscv/insns/movn.h
+++ b/riscv/insns/movn.h
@@ -0,0 +1,2 @@
+require_vector;
+if (RS1 & 0x1) RD = RS2;

diff --git a/riscv/insns/movz.h b/riscv/insns/movz.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..74cf8a967a95b0a50269600a73114d5067eae9a0 100644 (file)
--- a/riscv/insns/movz.h
+++ b/riscv/insns/movz.h
@@ -0,0 +1,2 @@
+require_vector;
+if (~RS1 & 0x1) RD = RS2;