freedreno/ir3: show input/output wrmask's in disasm

Currently it is always 0x1 (scalar), but that will change in a later
patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/freedreno/ir3/ir3_shader.c b/src/freedreno/ir3/ir3_shader.c
index 2f5777c4ec86982f76f21170259bf8d586d6c927..173693007618aab2d82b8114979ba2d020193854 100644 (file)
--- a/src/freedreno/ir3/ir3_shader.c
+++ b/src/freedreno/ir3/ir3_shader.c
@@ -384,9 +384,13 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out)
        foreach_input_n(instr, i, ir) {
                reg = instr->regs[0];
                regid = reg->num;
-               fprintf(out, "@in(%sr%d.%c)\tin%d\n",
+               fprintf(out, "@in(%sr%d.%c)\tin%d",
                                (reg->flags & IR3_REG_HALF) ? "h" : "",
                                (regid >> 2), "xyzw"[regid & 0x3], i);
+
+               if (reg->wrmask > 0x1)
+                       fprintf(out, " (wrmask=0x%x)", reg->wrmask);
+               fprintf(out, "\n");
        }
 
        /* print pre-dispatch texture fetches: */
@@ -402,9 +406,12 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out)
        foreach_output_n(instr, i, ir) {
                reg = instr->regs[0];
                regid = reg->num;
-               fprintf(out, "@out(%sr%d.%c)\tout%d\n",
+               fprintf(out, "@out(%sr%d.%c)\tout%d",
                                (reg->flags & IR3_REG_HALF) ? "h" : "",
                                (regid >> 2), "xyzw"[regid & 0x3], i);
+               if (reg->wrmask > 0x1)
+                       fprintf(out, " (wrmask=0x%x)", reg->wrmask);
+               fprintf(out, "\n");
        }
 
        struct ir3_const_state *const_state = &so->shader->const_state;