power_enums: introduce register aliases

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 56518d86c0f1086a14ef6631d71b07589132b755..3b529434b52ca287cdc72e46257ed5b66ae413b7 100644 (file)
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -304,6 +304,28 @@ class SVExtraReg(Enum):
 
         return cls.__members__.get(desc)
 
+    @property
+    def alias(self):
+        alias = {
+            Reg.RSp: Reg.RS,
+            Reg.RTp: Reg.RT,
+            Reg.FRAp: Reg.FRA,
+            Reg.FRBp: Reg.FRB,
+            Reg.FRSp: Reg.FRS,
+            Reg.FRTp: Reg.FRT,
+        }.get(self)
+        if alias is not None:
+            return alias
+
+        alias = {
+            Reg.RA_OR_ZERO: Reg.RA,
+            Reg.RT_OR_ZERO: Reg.RT,
+        }.get(self)
+        if alias is not None:
+            return alias
+
+        return self
+
 
 @unique
 class SVP64PredMode(Enum):