projects
/
nmigen.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
3b0b86f
)
vendor.lattice_ice40: fix typo.
author
whitequark
<cz@m-labs.hk>
Wed, 12 Jun 2019 17:38:14 +0000
(17:38 +0000)
committer
whitequark
<cz@m-labs.hk>
Wed, 12 Jun 2019 17:38:14 +0000
(17:38 +0000)
nmigen/vendor/lattice_ice40.py
patch
|
blob
|
history
diff --git
a/nmigen/vendor/lattice_ice40.py
b/nmigen/vendor/lattice_ice40.py
index ae8d0ce8641931237c3f5dbcf8854650cc7734a1..6120d106de142cbfeaaf0bdef37fda68a69feb68 100644
(file)
--- a/
nmigen/vendor/lattice_ice40.py
+++ b/
nmigen/vendor/lattice_ice40.py
@@
-133,7
+133,7
@@
class LatticeICE40Platform(TemplatedPlatform):
if invert is None:
return y
else:
- a = Signal.like(y, name="{}_x{}".format(
a
.name, 1 if invert else 0))
+ a = Signal.like(y, name="{}_x{}".format(
y
.name, 1 if invert else 0))
for bit in range(len(y)):
m.submodules += Instance("SB_LUT4",
p_LUT_INIT=0b01 if invert else 0b10,