i965/vec4: Only examine virtual_grf_end for GRF sources
authorIan Romanick <ian.d.romanick@intel.com>
Thu, 11 Sep 2014 00:57:54 +0000 (17:57 -0700)
committerIan Romanick <ian.d.romanick@intel.com>
Thu, 11 Sep 2014 18:18:36 +0000 (11:18 -0700)
If the source is not a GRF, it could have a register >= virtual_grf_count.
Accessing virtual_grf_end with such a register would lead to
out-of-bounds access.  Make sure the source is a GRF before accessing
virtual_grf_end.

Fixes Valgrind complaints while compiling some shaders.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
src/mesa/drivers/dri/i965/brw_vec4_cse.cpp

index a0f6e77f577aaa99883c9f0336a9197d652526e9..a9265530d1764ce277d479dd6de27d96f16a2f4c 100644 (file)
@@ -224,14 +224,18 @@ vec4_visitor::opt_cse_local(bblock_t *block)
             /* Kill any AEB entries using registers that don't get reused any
              * more -- a sure sign they'll fail operands_match().
              */
-            int last_reg_use = MAX2(MAX2(virtual_grf_end[src->reg * 4 + 0],
-                                         virtual_grf_end[src->reg * 4 + 1]),
-                                    MAX2(virtual_grf_end[src->reg * 4 + 2],
-                                         virtual_grf_end[src->reg * 4 + 3]));
-            if (src->file == GRF && last_reg_use < ip) {
-               entry->remove();
-               ralloc_free(entry);
-               break;
+            if (src->file == GRF) {
+               assert((src->reg * 4 + 3) < (virtual_grf_count * 4));
+
+               int last_reg_use = MAX2(MAX2(virtual_grf_end[src->reg * 4 + 0],
+                                            virtual_grf_end[src->reg * 4 + 1]),
+                                       MAX2(virtual_grf_end[src->reg * 4 + 2],
+                                            virtual_grf_end[src->reg * 4 + 3]));
+               if (last_reg_use < ip) {
+                  entry->remove();
+                  ralloc_free(entry);
+                  break;
+               }
             }
          }
       }