gallivm: add dst register index to lp_build_tgsi_context::emit_store

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
index e450092a82ca190841dfc83f621bb7ecfad43873..66f752989abeb3078d2f3a620c419b9e24080ee5 100644 (file)
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
@@ -313,7 +313,7 @@ lp_build_tgsi_inst_llvm(
    }
 
    if (info->num_dst > 0 && info->opcode != TGSI_OPCODE_STORE) {
-      bld_base->emit_store(bld_base, inst, info, emit_data.output);
+      bld_base->emit_store(bld_base, inst, info, 0, emit_data.output);
    }
    return TRUE;
 }

diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
index eb632b700ab1d5ee479604284ef9b1431fbcd647..eeeea5078107aee51fe0cc40d5dbaab5ec24cf06 100644 (file)
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
@@ -370,6 +370,7 @@ struct lp_build_tgsi_context
    void (*emit_store)(struct lp_build_tgsi_context *,
                       const struct tgsi_full_instruction *,
                       const struct tgsi_opcode_info *,
+                      unsigned index,
                       LLVMValueRef dst[4]);
 
    void (*emit_declaration)(struct lp_build_tgsi_context *,

diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 3e47372b5cf60c2b230a5874b2fca47e018c900d..435d1075aaaebbdc7124da05fce39a085207d62b 100644 (file)
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -1913,19 +1913,18 @@ emit_store(
    struct lp_build_tgsi_context * bld_base,
    const struct tgsi_full_instruction * inst,
    const struct tgsi_opcode_info * info,
+   unsigned index,
    LLVMValueRef dst[4])
 
 {
-   unsigned chan_index;
    enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode);
 
-   if(info->num_dst) {
-      TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
-
-         if (tgsi_type_is_64bit(dtype) && (chan_index == 1 || chan_index == 3))
-             continue;
-         emit_store_chan(bld_base, inst, 0, chan_index, dst[chan_index]);
-      }
+   unsigned writemask = inst->Dst[index].Register.WriteMask;
+   while (writemask) {
+      unsigned chan_index = u_bit_scan(&writemask);
+      if (tgsi_type_is_64bit(dtype) && (chan_index == 1 || chan_index == 3))
+          continue;
+      emit_store_chan(bld_base, inst, index, chan_index, dst[chan_index]);
    }
 }
 

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index fb18753a1081464aca437f90028bfab4b3eb37a6..d012c19a58ac1b58889f0a0fed82c7b8db0878d2 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1139,11 +1139,12 @@ static LLVMValueRef fetch_input_tes(
 static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
                             const struct tgsi_full_instruction *inst,
                             const struct tgsi_opcode_info *info,
+                            unsigned index,
                             LLVMValueRef dst[4])
 {
        struct si_shader_context *ctx = si_shader_context(bld_base);
        struct gallivm_state *gallivm = &ctx->gallivm;
-       const struct tgsi_full_dst_register *reg = &inst->Dst[0];
+       const struct tgsi_full_dst_register *reg = &inst->Dst[index];
        const struct tgsi_shader_info *sh_info = &ctx->shader->selector->info;
        unsigned chan_index;
        LLVMValueRef dw_addr, stride;
@@ -1157,7 +1158,7 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
         */
        if (reg->Register.File != TGSI_FILE_OUTPUT ||
            (dst[0] && LLVMGetTypeKind(LLVMTypeOf(dst[0])) == LLVMVectorTypeKind)) {
-               si_llvm_emit_store(bld_base, inst, info, dst);
+               si_llvm_emit_store(bld_base, inst, info, index, dst);
                return;
        }
 
@@ -1191,8 +1192,9 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
        base = LLVMGetParam(ctx->main_fn, ctx->param_tcs_offchip_offset);
        buf_addr = get_tcs_tes_buffer_address_from_reg(ctx, reg, NULL);
 
-
-       TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
+       uint32_t writemask = reg->Register.WriteMask;
+       while (writemask) {
+               chan_index = u_bit_scan(&writemask);
                LLVMValueRef value = dst[chan_index];
 
                if (inst->Instruction.Saturate)
@@ -1205,7 +1207,7 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
                value = LLVMBuildBitCast(gallivm->builder, value, ctx->i32, "");
                values[chan_index] = value;
 
-               if (inst->Dst[0].Register.WriteMask != 0xF && !is_tess_factor) {
+               if (reg->Register.WriteMask != 0xF && !is_tess_factor) {
                        ac_build_buffer_store_dword(&ctx->ac, buffer, value, 1,
                                                    buf_addr, base,
                                                    4 * chan_index, 1, 0, true, false);
@@ -1224,7 +1226,7 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
                }
        }
 
-       if (inst->Dst[0].Register.WriteMask == 0xF && !is_tess_factor) {
+       if (reg->Register.WriteMask == 0xF && !is_tess_factor) {
                LLVMValueRef value = lp_build_gather_values(gallivm,
                                                            values, 4);
                ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, buf_addr,

diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index 023f9a6a09339e0c39983ed53e9c789cea0c9f80..141dd34be3d98acd53661531747fc313993feedf 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -289,6 +289,7 @@ LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
                        const struct tgsi_full_instruction *inst,
                        const struct tgsi_opcode_info *info,
+                       unsigned index,
                        LLVMValueRef dst[4]);
 
 /* Combine these with & instead of |. */

diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index be7a0b97489cc03cb0dc983d3e2d73ccc3fea0ae..f0c7803c99766dc29e7cb9b23162c0ed96204219 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -881,14 +881,14 @@ static void emit_declaration(struct lp_build_tgsi_context *bld_base,
 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
                        const struct tgsi_full_instruction *inst,
                        const struct tgsi_opcode_info *info,
+                       unsigned index,
                        LLVMValueRef dst[4])
 {
        struct si_shader_context *ctx = si_shader_context(bld_base);
        struct gallivm_state *gallivm = &ctx->gallivm;
-       const struct tgsi_full_dst_register *reg = &inst->Dst[0];
+       const struct tgsi_full_dst_register *reg = &inst->Dst[index];
        LLVMBuilderRef builder = ctx->gallivm.builder;
        LLVMValueRef temp_ptr, temp_ptr2 = NULL;
-       unsigned chan, chan_index;
        bool is_vec_store = false;
        enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode);
 
@@ -899,16 +899,20 @@ void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
 
        if (is_vec_store) {
                LLVMValueRef values[4] = {};
-               TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan) {
+               uint32_t writemask = reg->Register.WriteMask;
+               while (writemask) {
+                       unsigned chan = u_bit_scan(&writemask);
                        LLVMValueRef index = LLVMConstInt(ctx->i32, chan, 0);
                        values[chan]  = LLVMBuildExtractElement(gallivm->builder,
                                                        dst[0], index, "");
                }
-               bld_base->emit_store(bld_base, inst, info, values);
+               bld_base->emit_store(bld_base, inst, info, index, values);
                return;
        }
 
-       TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
+       uint32_t writemask = reg->Register.WriteMask;
+       while (writemask) {
+               unsigned chan_index = u_bit_scan(&writemask);
                LLVMValueRef value = dst[chan_index];
 
                if (tgsi_type_is_64bit(dtype) && (chan_index == 1 || chan_index == 3))