targets/ppro: fix BIOS address

diff --git a/targets/ppro.py b/targets/ppro.py
index 1ec8c513a2fbeca3f6fa1034b1b747d8c8fc0112..3bd29ef2b5d5e278212b90635d63c35e7c7adb3b 100644 (file)
--- a/targets/ppro.py
+++ b/targets/ppro.py
@@ -63,7 +63,7 @@ class BaseSoC(SDRAMSoC):
        def __init__(self, platform, **kwargs):
                clk_freq = 80*1000*1000
                SDRAMSoC.__init__(self, platform, clk_freq,
-                       cpu_reset_address=0x160000, **kwargs)
+                       cpu_reset_address=0x60000, **kwargs)
 
                self.submodules.crg = _CRG(platform, clk_freq)