gas/
authorJan Beulich <jbeulich@novell.com>
Tue, 15 Feb 2005 08:11:14 +0000 (08:11 +0000)
committerJan Beulich <jbeulich@novell.com>
Tue, 15 Feb 2005 08:11:14 +0000 (08:11 +0000)
2005-02-15  Jan Beulich  <jbeulich@novell.com>

* config/tc-ia64.c (md_apply_fix3): Call ia64_gen_real_reloc_type
instead of explicitly dealing with the translation; exclude
relocations that are already pcrel, however.

gas/testsuite/
2005-02-15  Jan Beulich  <jbeulich@novell.com>

* gas/ia64/pcrel.[ds]: New.
* gas/ia64/ia64.exp: Run new test.

gas/ChangeLog
gas/config/tc-ia64.c
gas/testsuite/ChangeLog
gas/testsuite/gas/ia64/ia64.exp
gas/testsuite/gas/ia64/pcrel.d [new file with mode: 0644]
gas/testsuite/gas/ia64/pcrel.s [new file with mode: 0644]

index d8f54c6c84e9eea446a00288eb62dbb149ba3650..fe8e26dc3e825616677aafb576e7db974b98445e 100644 (file)
@@ -1,3 +1,9 @@
+2005-02-15  Jan Beulich  <jbeulich@novell.com>
+
+       * config/tc-ia64.c (md_apply_fix3): Call ia64_gen_real_reloc_type
+       instead of explicitly dealing with the translation; exclude
+       relocations that are already pcrel, however.
+
 2005-02-15  Jan Beulich  <jbeulich@novell.com>
 
        * config/tc-ia64.c: Include limits.h (if available).
index 4520d0b14ffa3f44333dbbfc328fb87a6b4f9cad..42aad8f191f77cba5ea85b06e9eb5fc28f561a87 100644 (file)
@@ -11243,27 +11243,24 @@ md_apply_fix3 (fix, valP, seg)
 
   if (fix->fx_pcrel)
     {
-      switch (fix->fx_r_type)
-       {
-       case BFD_RELOC_IA64_DIR32MSB:
-         fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
-         break;
-
-       case BFD_RELOC_IA64_DIR32LSB:
-         fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
-         break;
-
-       case BFD_RELOC_IA64_DIR64MSB:
-         fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
-         break;
-
-       case BFD_RELOC_IA64_DIR64LSB:
-         fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
-         break;
-
-       default:
-         break;
-       }
+    switch (fix->fx_r_type)
+      {
+      case BFD_RELOC_IA64_PCREL21B: break;
+      case BFD_RELOC_IA64_PCREL21BI: break;
+      case BFD_RELOC_IA64_PCREL21F: break;
+      case BFD_RELOC_IA64_PCREL21M: break;
+      case BFD_RELOC_IA64_PCREL60B: break;
+      case BFD_RELOC_IA64_PCREL22: break;
+      case BFD_RELOC_IA64_PCREL64I: break;
+      case BFD_RELOC_IA64_PCREL32MSB: break;
+      case BFD_RELOC_IA64_PCREL32LSB: break;
+      case BFD_RELOC_IA64_PCREL64MSB: break;
+      case BFD_RELOC_IA64_PCREL64LSB: break;
+      default:
+       fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
+                                              fix->fx_r_type);
+       break;
+      }
     }
   if (fix->fx_addsy)
     {
index 849b28f21ed7df6589a5ece9272398b0bc50b186..e1c1781de3fdf8e66a1369838701f363184fcc1b 100644 (file)
@@ -1,3 +1,8 @@
+2005-02-15  Jan Beulich  <jbeulich@novell.com>
+
+       * gas/ia64/pcrel.[ds]: New.
+       * gas/ia64/ia64.exp: Run new test.
+
 2005-02-15  Jan Beulich  <jbeulich@novell.com>
 
        * gas/ia64/dv-raw-err.l: Expect specific resource for RAW violation on b0.
index 3a948651154c8594d36ae583cf91a41d8db02517..2968622d092c789616f89ae60344ff3e9129e96e 100644 (file)
@@ -53,6 +53,7 @@ if [istarget "ia64-*"] then {
 
     run_dump_test "reloc"
     run_list_test "reloc-bad" ""
+    run_dump_test "pcrel"
 
     run_dump_test "real"
     run_dump_test "align"
diff --git a/gas/testsuite/gas/ia64/pcrel.d b/gas/testsuite/gas/ia64/pcrel.d
new file mode 100644 (file)
index 0000000..c047caa
--- /dev/null
@@ -0,0 +1,62 @@
+#objdump: -rs
+#name: ia64 pcrel
+
+.*: +file format .*
+
+RELOCATION RECORDS FOR \[\.mov\]:
+OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
+0+10[[:space:]]+PCREL22[[:space:]]+esym
+0+20[[:space:]]+PCREL22[[:space:]]+esym\+0x0+20
+0+30[[:space:]]+PCREL22[[:space:]]+esym
+0+40[[:space:]]+PCREL22[[:space:]]+esym\+0xf+e0
+
+RELOCATION RECORDS FOR \[\.movl\]:
+OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
+0+12[[:space:]]+PCREL64I[[:space:]]+esym
+0+22[[:space:]]+PCREL64I[[:space:]]+esym\+0x0+20
+0+32[[:space:]]+PCREL64I[[:space:]]+esym
+0+42[[:space:]]+PCREL64I[[:space:]]+esym\+0xf+e0
+
+RELOCATION RECORDS FOR \[\.data8\]:
+OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
+0+10[[:space:]]+PCREL64[LM]SB[[:space:]]+esym
+0+20[[:space:]]+PCREL64[LM]SB[[:space:]]+esym\+0x0+20
+0+30[[:space:]]+PCREL64[LM]SB[[:space:]]+esym
+0+40[[:space:]]+PCREL64[LM]SB[[:space:]]+esym\+0xf+e0
+
+RELOCATION RECORDS FOR \[\.data4\]:
+OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
+0+10[[:space:]]+PCREL32[LM]SB[[:space:]]+esym
+0+20[[:space:]]+PCREL32[LM]SB[[:space:]]+esym\+0x0+20
+0+30[[:space:]]+PCREL32[LM]SB[[:space:]]+esym
+0+40[[:space:]]+PCREL32[LM]SB[[:space:]]+esym\+0xf+e0
+
+
+Contents of section \.mov:
+ 0+00 1d108001 00240000 00020000 00000020  .*
+ 0+10 1d100000 00240000 00020000 00000020  .*
+ 0+20 1d100000 00240000 00020000 00000020  .*
+ 0+30 1d100000 00240000 00020000 00000020  .*
+ 0+40 1d100000 00240000 00020000 00000020  .*
+ 0+50 1d100000 00240000 00020000 00000020  .*
+Contents of section \.movl:
+ 0+00 05000000 01000000 00000040 00060060  .*
+ 0+10 05000000 01000000 00000040 00000060  .*
+ 0+20 05000000 01000000 00000040 00000060  .*
+ 0+30 05000000 01000000 00000040 00000060  .*
+ 0+40 05000000 01000000 00000040 00000060  .*
+ 0+50 05000000 01000000 00000040 00000060  .*
+Contents of section \.data8:
+ 0+00 60000000 00000000 00000000 00000000  .*
+ 0+10 00000000 00000000 00000000 00000000  .*
+ 0+20 00000000 00000000 00000000 00000000  .*
+ 0+30 00000000 00000000 00000000 00000000  .*
+ 0+40 00000000 00000000 00000000 00000000  .*
+ 0+50 00000000 00000000 00000000 00000000  .*
+Contents of section \.data4:
+ 0+00 60000000 00000000 00000000 00000000  .*
+ 0+10 00000000 00000000 00000000 00000000  .*
+ 0+20 00000000 00000000 00000000 00000000  .*
+ 0+30 00000000 00000000 00000000 00000000  .*
+ 0+40 00000000 00000000 00000000 00000000  .*
+ 0+50 00000000 00000000 00000000 00000000  .*
diff --git a/gas/testsuite/gas/ia64/pcrel.s b/gas/testsuite/gas/ia64/pcrel.s
new file mode 100644 (file)
index 0000000..d63130a
--- /dev/null
@@ -0,0 +1,87 @@
+.explicit
+.global esym
+
+.altmacro
+
+.macro begin n, attr
+ .section .&n, attr, @progbits
+ .align 16
+_&n:
+.endm
+.macro end n
+ .align 16
+_e&n:
+.endm
+
+.macro m1 op, opnd1
+ .align 16
+       op              opnd1 _e&op - _&op
+.endm
+.macro m2 op, opnd1
+ .align 16
+       op              opnd1 @pcrel(esym)
+.endm
+.macro m3 op, opnd1
+ .align 16
+       op              opnd1 esym - _&op
+.endm
+.macro m4 op, opnd1
+ .align 16
+       op              opnd1 esym - .
+.endm
+.macro m5 op, opnd1
+ .align 16
+       op              opnd1 esym - _e&op
+.endm
+.macro m6 op, opnd1
+ .align 16
+       op              opnd1 0
+.endm
+
+begin  mov, "ax"
+       m1      mov, r2 =
+       ;;
+       m2      mov, r2 =
+       ;;
+       m3      mov, r2 =
+       ;;
+       m4      mov, r2 =
+       ;;
+       m5      mov, r2 =
+       ;;
+       m6      mov, r2 =
+       ;;
+end mov
+
+begin  movl, "ax"
+       m1      movl, r2 =
+       ;;
+       m2      movl, r2 =
+       ;;
+       m3      movl, r2 =
+       ;;
+       m4      movl, r2 =
+       ;;
+       m5      movl, r2 =
+       ;;
+       m6      movl, r2 =
+       ;;
+end movl
+
+begin data8, "a"
+       m1      data8
+       m2      data8
+       m3      data8
+       m4      data8
+       m5      data8
+       m6      data8
+end data8
+
+begin data4, "a"
+       m1      data4
+       m2      data4
+       m3      data4
+       m4      data4
+       m5      data4
+       m6      data4
+end data4