RVTEST_RV64U # Define TVM used by program.
-#define SV_ELWIDTH_TEST( inst, vl, elwidth, wid1, wid2, \
- testdata, expect1, expect2, expect3 ) \
- \
- la x12, testdata ; \
- la x13, (testdata+elwidth); \
- la x14, (testdata+elwidth*2); \
- la x15, (testdata+elwidth*3); \
- la x16, (testdata+elwidth*4); \
- la x17, (testdata+elwidth*5); \
- \
- li x28, 0xa5a5a5a5a5a5a5a5; \
- li x29, 0xa5a5a5a5a5a5a5a5; \
- li x30, 0xa5a5a5a5a5a5a5a5; \
- \
- SET_SV_MVL( vl); \
- SET_SV_2CSRS( SV_REG_CSR( 1, 12, wid1, 12, 1), \
- SV_REG_CSR( 1, 28, wid2, 28, 1)); \
- SET_SV_VL( vl ); \
- \
- inst x28, 0(x12); \
- \
- CLR_SV_CSRS(); \
- SET_SV_VL( 1); \
- SET_SV_MVL( 1); \
- \
- TEST_SV_IMM( x28, expect1 ); \
- TEST_SV_IMM( x29, expect2 ); \
- TEST_SV_IMM( x30, expect3 );
+
# SV test: vector-vector add
# Test code region.
RVTEST_CODE_BEGIN # Start of test code.
- SV_ELWIDTH_TEST( ld , 2, 8, SV_W_DFLT, SV_W_DFLT, testdata1,
- 0x8979695949392919, 0x8777675747372717, 0xa5a5a5a5a5a5a5a5 )
- SV_ELWIDTH_TEST( ld , 3, 8, SV_W_DFLT, SV_W_DFLT, testdata1,
- 0x8979695949392919, 0x8777675747372717, 0x8676665646362616 )
- SV_ELWIDTH_TEST( ld , 3, 8, SV_W_16BIT, SV_W_DFLT, testdata1,
- 0x0000000000002919, 0x0000000000004939, 0x0000000000006959 )
- SV_ELWIDTH_TEST( ld , 5, 8, SV_W_16BIT, SV_W_32BIT, testdata1,
- 0x0000493900002919, 0xffff897900006959, 0xa5a5a5a500002717 )
- SV_ELWIDTH_TEST( ld , 5, 8, SV_W_32BIT, SV_W_16BIT, testdata1,
- 0x6757271769592919, 0xa5a5a5a5a5a52616, 0xa5a5a5a5a5a5a5a5 )
- SV_ELWIDTH_TEST( ld , 7, 8, SV_W_16BIT, SV_W_8BIT, testdata1,
- 0xa557371779593919, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 )
- SV_ELWIDTH_TEST( ld , 11, 8, SV_W_8BIT, SV_W_16BIT, testdata1,
- 0x0049003900290019, 0xff89007900690059, 0xa5a5003700270017 )
+ SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
+ 2, SV_W_DFLT, SV_W_DFLT, SV_W_DFLT, 1, 1, 1,
+ 0x8979695949392919, 0x8777675747372717, 0xa5a5a5a5a5a5a5a5)
+ SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
+ 3, SV_W_DFLT, SV_W_DFLT, SV_W_DFLT, 1, 1, 1,
+ 0x8979695949392919, 0x8777675747372717, 0x8676665646362616)
+ SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
+ 3, SV_W_16BIT, SV_W_16BIT, SV_W_DFLT, 1, 1, 1,
+ 0x0000000000002919, 0x0000000000004939, 0x0000000000006959)
+ SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
+ 5, SV_W_16BIT, SV_W_16BIT, SV_W_32BIT, 1, 1, 1,
+ 0x0000493900002919, 0xffff897900006959, 0xa5a5a5a500002717)
+ SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
+ 5, SV_W_32BIT, SV_W_32BIT, SV_W_16BIT, 1, 1, 1,
+ 0x6757271769592919, 0xa5a5a5a5a5a52616, 0xa5a5a5a5a5a5a5a5)
+ SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
+ 7, SV_W_16BIT, SV_W_16BIT, SV_W_8BIT, 1, 1, 1,
+ 0xa557371779593919, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5)
+ SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
+ 11, SV_W_8BIT, SV_W_8BIT, SV_W_16BIT, 1, 1, 1,
+ 0x0049003900290019, 0xff89007900690059, 0xa5a5003700270017)
RVTEST_PASS # Signal success.
fail:
# This section is optional, and this data is NOT saved in the output.
.data
.align 3
-testdata1:
+testdata:
.dword 0x8979695949392919
.dword 0x8777675747372717
.dword 0x8676665646362616