radv: implement VK_AMD_mixed_attachment_samples

With VK_AMD_mixed_attachment_samples, the number of depth/stencil
samples isn't always equal to the number of color samples. Adjust
the number of Z samples when it's different but make sure to have
a consistent sample count if there are no depth/stencil attachments.

Also adjust the number of samples used for fragment shaders which is
the number of color samples if mixed attachment samples are used.

Only enabled on GFX8+ because it's untested on previous chips.

All dEQP-VK.pipeline.multisample.mixed_attachment_samples.* now pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3018>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3018>

diff --git a/docs/relnotes/new_features.txt b/docs/relnotes/new_features.txt
index a9cc34bea23a34fbd40392b0d21ddc4c9dc017bd..a1e23a02eb37c172ce513277a63dd84be28607c4 100644 (file)
--- a/docs/relnotes/new_features.txt
+++ b/docs/relnotes/new_features.txt
@@ -3,6 +3,7 @@ GL_ARB_gl_spirv on radeonsi.
 GL_ARB_spirv_extensions on radeonsi.
 GL_EXT_direct_state_access for compatibility profile.
 VK_AMD_device_coherent_memory on RADV.
+VK_AMD_mixed_attachment_samples on RADV.
 VK_EXT_subgroup_size_control on RADV.
 VK_KHR_separate_depth_stencil_layouts on Intel, RADV.
 VK_KHR_shader_subgroup_extended_types on RADV.

diff --git a/src/amd/vulkan/radv_extensions.py b/src/amd/vulkan/radv_extensions.py
index 2a1d50f12543d274ad64e2b9f3df08b57da0f35f..df25754469095a80c724694e32c1c40ec186ecfa 100644 (file)
--- a/src/amd/vulkan/radv_extensions.py
+++ b/src/amd/vulkan/radv_extensions.py
@@ -152,6 +152,7 @@ EXTENSIONS = [
     Extension('VK_AMD_gcn_shader',                        1, True),
     Extension('VK_AMD_gpu_shader_half_float',             1, '!device->use_aco && device->rad_info.chip_class >= GFX9'),
     Extension('VK_AMD_gpu_shader_int16',                  1, '!device->use_aco && device->rad_info.chip_class >= GFX9'),
+    Extension('VK_AMD_mixed_attachment_samples',          1, 'device->rad_info.chip_class >= GFX8'),
     Extension('VK_AMD_rasterization_order',               1, 'device->rad_info.has_out_of_order_rast'),
     Extension('VK_AMD_shader_ballot',                     1, 'device->use_shader_ballot'),
     Extension('VK_AMD_shader_core_properties',            1, True),

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index ea6330690023e98c06cf94d1743d1d9771aafd06..7be3c64fd6326af5e605f070a3083f45e5902535 100644 (file)
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -955,10 +955,27 @@ static uint32_t si_translate_fill(VkPolygonMode func)
        }
 }
 
-static uint8_t radv_pipeline_get_ps_iter_samples(const VkPipelineMultisampleStateCreateInfo *vkms)
+static uint8_t radv_pipeline_get_ps_iter_samples(const VkGraphicsPipelineCreateInfo *pCreateInfo)
 {
-       uint32_t num_samples = vkms->rasterizationSamples;
+       const VkPipelineMultisampleStateCreateInfo *vkms = pCreateInfo->pMultisampleState;
+       RADV_FROM_HANDLE(radv_render_pass, pass, pCreateInfo->renderPass);
+       struct radv_subpass *subpass = &pass->subpasses[pCreateInfo->subpass];
        uint32_t ps_iter_samples = 1;
+       uint32_t num_samples;
+
+       /* From the Vulkan 1.1.129 spec, 26.7. Sample Shading:
+        *
+        * "If the VK_AMD_mixed_attachment_samples extension is enabled and the
+        *  subpass uses color attachments, totalSamples is the number of
+        *  samples of the color attachments. Otherwise, totalSamples is the
+        *  value of VkPipelineMultisampleStateCreateInfo::rasterizationSamples
+        *  specified at pipeline creation time."
+        */
+       if (subpass->has_color_att) {
+               num_samples = subpass->color_sample_count;
+       } else {
+               num_samples = vkms->rasterizationSamples;
+       }
 
        if (vkms->sampleShadingEnable) {
                ps_iter_samples = ceil(vkms->minSampleShading * num_samples);
@@ -1167,7 +1184,7 @@ radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline,
                if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.ps.force_persample) {
                        ps_iter_samples = ms->num_samples;
                } else {
-                       ps_iter_samples = radv_pipeline_get_ps_iter_samples(vkms);
+                       ps_iter_samples = radv_pipeline_get_ps_iter_samples(pCreateInfo);
                }
        } else {
                ms->num_samples = 1;
@@ -1210,11 +1227,15 @@ radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline,
                                S_028A48_VPORT_SCISSOR_ENABLE(1);
 
        if (ms->num_samples > 1) {
+               RADV_FROM_HANDLE(radv_render_pass, pass, pCreateInfo->renderPass);
+               struct radv_subpass *subpass = &pass->subpasses[pCreateInfo->subpass];
+               uint32_t z_samples = subpass->depth_stencil_attachment ? subpass->depth_sample_count : ms->num_samples;
                unsigned log_samples = util_logbase2(ms->num_samples);
+               unsigned log_z_samples = util_logbase2(z_samples);
                unsigned log_ps_iter_samples = util_logbase2(ps_iter_samples);
                ms->pa_sc_mode_cntl_0 |= S_028A48_MSAA_ENABLE(1);
                ms->pa_sc_line_cntl |= S_028BDC_EXPAND_LINE_WIDTH(1); /* CM_R_028BDC_PA_SC_LINE_CNTL */
-               ms->db_eqaa |= S_028804_MAX_ANCHOR_SAMPLES(log_samples) |
+               ms->db_eqaa |= S_028804_MAX_ANCHOR_SAMPLES(log_z_samples) |
                        S_028804_PS_ITER_SAMPLES(log_ps_iter_samples) |
                        S_028804_MASK_EXPORT_NUM_SAMPLES(log_samples) |
                        S_028804_ALPHA_TO_MASK_NUM_SAMPLES(log_samples);
@@ -2320,7 +2341,7 @@ radv_generate_graphics_pipeline_key(struct radv_pipeline *pipeline,
                radv_pipeline_get_multisample_state(pCreateInfo);
        if (vkms && vkms->rasterizationSamples > 1) {
                uint32_t num_samples = vkms->rasterizationSamples;
-               uint32_t ps_iter_samples = radv_pipeline_get_ps_iter_samples(vkms);
+               uint32_t ps_iter_samples = radv_pipeline_get_ps_iter_samples(pCreateInfo);
                key.num_samples = num_samples;
                key.log2_ps_iter_samples = util_logbase2(ps_iter_samples);
        }