check variable rather than explicit == LDST_IDX

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index 6e86f61807c366a9d8278c90a4ca55276cae9e85..7bf93eff6dd564a81ad1ec9ede541e520cfdac0c 100644 (file)
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -1155,7 +1155,7 @@ class SVP64Asm:
                 vli = True
             elif encmode == 'sea':
                 assert sv_mode in (None, 0b00, 0b01)
-                assert rm['mode'] == "LDST_IDX"
+                assert is_ldst_idx
                 sea = True
                 assert failfirst is False, "cannot use ffirst+signed-address"
             elif is_bc: