cleaning up for PR

diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 3323f13f0244dea5bab80170e8dc2da1149be623..276540aa174731fb7cb75251dff6371db5626586 100644 (file)
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -1304,10 +1304,6 @@ inline const RTLIL::SigBit &RTLIL::SigSpecConstIterator::operator*() const {
 }
 
 inline RTLIL::SigBit::SigBit(const RTLIL::SigSpec &sig) {
-       if(sig.size() != 1 || sig.chunks().size() != 1) {
-    std::cout << "rtp " << sig.size() << std::endl;
-    std::cout << "rtp " << sig.chunks().size() << std::endl;
-  }
        log_assert(sig.size() == 1 && sig.chunks().size() == 1);
        *this = SigBit(sig.chunks().front());
 }

diff --git a/passes/equiv/equiv_make.cc b/passes/equiv/equiv_make.cc
index b4905f7c34e37cb8e3869583fb35aed5d445c59f..cfb4d4438e4f588f8a1ada05256257a85c34d4b3 100644 (file)
--- a/passes/equiv/equiv_make.cc
+++ b/passes/equiv/equiv_make.cc
@@ -290,7 +290,7 @@ struct EquivMakeWorker
 
                init_bit2driven();
 
-               pool<Cell*>     visited_cells;
+               pool<Cell*> visited_cells;
                for (auto c : cells_list)
                for (auto &conn : c->connections())
                        if (!ct.cell_output(c->type, conn.first)) {
@@ -418,7 +418,7 @@ struct EquivMakeWorker
                }
        }
 
-       bool check_signal_in_fanout(pool<Cell*> & visited_cells, SigSpec source_bit, SigSpec target_bit)
+       bool check_signal_in_fanout(pool<Cell*> & visited_cells, SigBit source_bit, SigBit target_bit)
        {
                if (source_bit == target_bit)
                        return true;