#define PPC_PLATFORM_POWER8 13
#define PPC_PLATFORM_POWER9 14
+/* This is not yet official. */
+#define PPC_PLATFORM_FUTURE 15
+
/* AT_HWCAP bits. These must match the values defined in the Linux kernel. */
#define PPC_FEATURE_32 0x80000000
#define PPC_FEATURE_64 0x40000000
#define PPC_FEATURE2_SCV 0x00100000
#define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000
+/* These are not yet official. */
+#define PPC_FEATURE2_ARCH_3_1 0x00040000
+#define PPC_FEATURE2_MMA 0x00020000
/* Thread Control Block (TCB) offsets of the AT_PLATFORM, AT_HWCAP and
AT_HWCAP2 values. These must match the values defined in GLIBC. */
{ "arch_3_00", PPC_FEATURE2_ARCH_3_00, 1 },
{ "ieee128", PPC_FEATURE2_HAS_IEEE128, 1 },
{ "darn", PPC_FEATURE2_DARN, 1 },
- { "scv", PPC_FEATURE2_SCV, 1 }
+ { "scv", PPC_FEATURE2_SCV, 1 },
+ { "arch_3_1", PPC_FEATURE2_ARCH_3_1, 1 },
+ { "mma", PPC_FEATURE2_MMA, 1 },
};
static void altivec_init_builtins (void);
CLONE_ISA_2_06, /* ISA 2.06 (power7). */
CLONE_ISA_2_07, /* ISA 2.07 (power8). */
CLONE_ISA_3_00, /* ISA 3.00 (power9). */
+ CLONE_ISA_3_1, /* ISA 3.1 (future). */
CLONE_MAX
};
{ OPTION_MASK_POPCNTD, "arch_2_06" }, /* ISA 2.06 (power7). */
{ OPTION_MASK_P8_VECTOR, "arch_2_07" }, /* ISA 2.07 (power8). */
{ OPTION_MASK_P9_VECTOR, "arch_3_00" }, /* ISA 3.00 (power9). */
+ { OPTION_MASK_FUTURE, "arch_3_1" }, /* ISA 3.1 (future). */
};