* gas/config/tc-avr.c: Change ISA for devices with USB support to

	AVR_ISA_XMEGAU

	* include/opcode/avr.h: Rename AVR_ISA_XCH to AVR_ISA_RMW. Remove
	from AVR_ISA_XMEGA and add new AVR_ISA_XMEGAU

diff --git a/ChangeLog b/ChangeLog
index 2d6d310822890623d76eaef0d27fa7dc1edb7d9c..ed3bc27d527e934bcf6a0ca4fbe7e23c4060fc95 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2013-06-01  George Thomas <george.thomas@atmel.com>
+
+        * include/opcode/avr.h: Rename AVR_ISA_XCH to AVR_ISA_RMW. Remove
+        from AVR_ISA_XMEGA and add new AVR_ISA_XMEGAU
+
 2013-05-06  Sandra Loosemore  <sandra@codesourcery.com>
 
        * COPYING.NEWLIB: Add Altera Corporation copyright.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d429af9c643e472d8fc1c465c7c6750b683785a3..5c631351ac86a860d671bea1a7333fca02ab693e 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2013-06-01  George Thomas <george.thomas@atmel.com>
+
+        * gas/config/tc-avr.c: Change ISA for devices with USB support to
+       AVR_ISA_XMEGAU
+
 2013-05-31  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/tc-i386.c (md_begin): Don't align text/data/bss sections

diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c
index a673fe10bb700aac0506c4f24205494d04757fe0..285aa7c8bcbc6598197a92e429f60cbf5fd6ce3c 100644 (file)
--- a/gas/config/tc-avr.c
+++ b/gas/config/tc-avr.c
@@ -268,18 +268,18 @@ static struct mcu_type_s mcu_types[] =
   {"atxmega64a3", AVR_ISA_XMEGA,  bfd_mach_avrxmega4},
   {"atxmega64d3", AVR_ISA_XMEGA,  bfd_mach_avrxmega4},
   {"atxmega64a1", AVR_ISA_XMEGA,  bfd_mach_avrxmega5},
-  {"atxmega64a1u",AVR_ISA_XMEGA,  bfd_mach_avrxmega5},
+  {"atxmega64a1u",AVR_ISA_XMEGAU, bfd_mach_avrxmega5},
   {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
-  {"atxmega128b1", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
+  {"atxmega128b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
   {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
   {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
   {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
   {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
   {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
-  {"atxmega256a3bu",AVR_ISA_XMEGA,bfd_mach_avrxmega6},
+  {"atxmega256a3bu",AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
   {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
   {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
-  {"atxmega128a1u", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
+  {"atxmega128a1u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7},
   {NULL, 0, 0}
 };
 

diff --git a/include/opcode/avr.h b/include/opcode/avr.h
index 6e86c07ba0a211b8a586be6ce93a816491b66f3a..f1d73ad9292620383bee6783b03bb0fecee529f7 100644 (file)
--- a/include/opcode/avr.h
+++ b/include/opcode/avr.h
@@ -33,7 +33,7 @@
 #define AVR_ISA_MOVW  0x1000 /* device has MOVW */
 #define AVR_ISA_SPMX  0x2000 /* device has SPM Z[+] */
 #define AVR_ISA_DES   0x4000 /* device has DES */
-#define AVR_ISA_XCH   0x8000 /* device has XCH, LAC, LAS, LAT */
+#define AVR_ISA_RMW   0x8000 /* device has RMW instructions XCH,LAC,LAS,LAT */
 
 #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
 #define AVR_ISA_2xxx  (AVR_ISA_TINY1 | AVR_ISA_SRAM)
@@ -53,7 +53,8 @@
 #define AVR_ISA_M323  (AVR_ISA_M161 | AVR_ISA_BRK)
 #define AVR_ISA_M128  (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
 #define AVR_ISA_M256  (AVR_ISA_M128 | AVR_ISA_EIND)
-#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES | AVR_ISA_XCH)
+#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES)
+#define AVR_ISA_XMEGAU (AVR_ISA_XMEGA | AVR_ISA_RMW)
 
 #define AVR_ISA_AVR1   AVR_ISA_TINY1
 #define AVR_ISA_AVR2   AVR_ISA_2xxx
@@ -266,10 +267,10 @@ AVR_INSN (ror,  "r",   "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407)
 AVR_INSN (swap, "r",   "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402)
 
    /* Atomic memory operations for XMEGA.  List before `sts'.  */
-AVR_INSN (xch,  "z,r",   "1001001rrrrr0100", 1, AVR_ISA_XCH, 0x9204)
-AVR_INSN (las,  "z,r",   "1001001rrrrr0101", 1, AVR_ISA_XCH, 0x9205)
-AVR_INSN (lac,  "z,r",   "1001001rrrrr0110", 1, AVR_ISA_XCH, 0x9206)
-AVR_INSN (lat,  "z,r",   "1001001rrrrr0111", 1, AVR_ISA_XCH, 0x9207)
+AVR_INSN (xch,  "z,r",   "1001001rrrrr0100", 1, AVR_ISA_RMW, 0x9204)
+AVR_INSN (las,  "z,r",   "1001001rrrrr0101", 1, AVR_ISA_RMW, 0x9205)
+AVR_INSN (lac,  "z,r",   "1001001rrrrr0110", 1, AVR_ISA_RMW, 0x9206)
+AVR_INSN (lat,  "z,r",   "1001001rrrrr0111", 1, AVR_ISA_RMW, 0x9207)
 
    /* Known to be decoded as `nop' by the old core.  */
 AVR_INSN (movw, "v,v", "00000001ddddrrrr", 1, AVR_ISA_MOVW, 0x0100)