(mem:HI (plus:SI (match_dup 1) (match_dup 2))))]
"")
-;; These convert sequences such as `mov #k,r0; add r15,r0; mov.l @r0,rn'
-;; to `mov #k,r0; mov.l @(r0,r15),rn'. These sequences are generated by
-;; reload when the constant is too large for a reg+offset address.
-
-;; ??? We would get much better code if this was done in reload. This would
-;; require modifying find_reloads_address to recognize that if the constant
-;; is out-of-range for an immediate add, then we get better code by reloading
-;; the constant into a register than by reloading the sum into a register,
-;; since the former is one instruction shorter if the address does not need
-;; to be offsettable. Unfortunately this does not work, because there is
-;; only one register, r0, that can be used as an index register. This register
-;; is also the function return value register. So, if we try to force reload
-;; to use double-reg addresses, then we end up with some instructions that
-;; need to use r0 twice. The only way to fix this is to change the calling
-;; convention so that r0 is not used to return values.
-
-(define_peephole
- [(set (match_operand:SI 0 "register_operand" "=r")
- (plus:SI (match_dup 0) (match_operand:SI 1 "register_operand" "r")))
- (set (mem:SI (match_dup 0))
- (match_operand:SI 2 "general_movsrc_operand" ""))]
- "TARGET_SH1 && REGNO (operands[0]) == 0 && reg_unused_after (operands[0], insn)"
- "mov.l %2,@(%0,%1)")
-
-(define_peephole
- [(set (match_operand:SI 0 "register_operand" "=r")
- (plus:SI (match_dup 0) (match_operand:SI 1 "register_operand" "r")))
- (set (match_operand:SI 2 "general_movdst_operand" "")
- (mem:SI (match_dup 0)))]
- "TARGET_SH1 && REGNO (operands[0]) == 0 && reg_unused_after (operands[0], insn)"
- "mov.l @(%0,%1),%2")
-
-(define_peephole
- [(set (match_operand:SI 0 "register_operand" "=r")
- (plus:SI (match_dup 0) (match_operand:SI 1 "register_operand" "r")))
- (set (mem:HI (match_dup 0))
- (match_operand:HI 2 "general_movsrc_operand" ""))]
- "TARGET_SH1 && REGNO (operands[0]) == 0 && reg_unused_after (operands[0], insn)"
- "mov.w %2,@(%0,%1)")
-
-(define_peephole
- [(set (match_operand:SI 0 "register_operand" "=r")
- (plus:SI (match_dup 0) (match_operand:SI 1 "register_operand" "r")))
- (set (match_operand:HI 2 "general_movdst_operand" "")
- (mem:HI (match_dup 0)))]
- "TARGET_SH1 && REGNO (operands[0]) == 0 && reg_unused_after (operands[0], insn)"
- "mov.w @(%0,%1),%2")
-
-(define_peephole
- [(set (match_operand:SI 0 "register_operand" "=r")
- (plus:SI (match_dup 0) (match_operand:SI 1 "register_operand" "r")))
- (set (mem:QI (match_dup 0))
- (match_operand:QI 2 "general_movsrc_operand" ""))]
- "TARGET_SH1 && REGNO (operands[0]) == 0 && reg_unused_after (operands[0], insn)"
- "mov.b %2,@(%0,%1)")
-
-(define_peephole
- [(set (match_operand:SI 0 "register_operand" "=r")
- (plus:SI (match_dup 0) (match_operand:SI 1 "register_operand" "r")))
- (set (match_operand:QI 2 "general_movdst_operand" "")
- (mem:QI (match_dup 0)))]
- "TARGET_SH1 && REGNO (operands[0]) == 0 && reg_unused_after (operands[0], insn)"
- "mov.b @(%0,%1),%2")
-
(define_peephole
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (match_dup 0) (match_operand:SI 1 "register_operand" "r")))