[(set (match_dup 0) (match_dup 2))]
"operands[2] = get_pool_constant (operands[1]);")
+(define_insn "*la_64"
+ [(set (match_operand:DI 0 "register_operand" "=d,d")
+ (match_operand:QI 1 "address_operand" "U,W"))]
+ "TARGET_64BIT"
+ "@
+ la\t%0,%a1
+ lay\t%0,%a1"
+ [(set_attr "op_type" "RX,RXY")
+ (set_attr "type" "la")])
+
+(define_peephole2
+ [(parallel
+ [(set (match_operand:DI 0 "register_operand" "")
+ (match_operand:QI 1 "address_operand" ""))
+ (clobber (reg:CC 33))])]
+ "TARGET_64BIT
+ && strict_memory_address_p (VOIDmode, operands[1])
+ && preferred_la_operand_p (operands[1])"
+ [(set (match_dup 0) (match_dup 1))]
+ "")
+
+(define_peephole2
+ [(set (match_operand:DI 0 "register_operand" "")
+ (match_operand:DI 1 "register_operand" ""))
+ (parallel
+ [(set (match_dup 0)
+ (plus:DI (match_dup 0)
+ (match_operand:DI 2 "nonmemory_operand" "")))
+ (clobber (reg:CC 33))])]
+ "TARGET_64BIT
+ && !reg_overlap_mentioned_p (operands[0], operands[2])
+ && strict_memory_address_p (VOIDmode, gen_rtx_PLUS (DImode, operands[1], operands[2]))
+ && preferred_la_operand_p (gen_rtx_PLUS (DImode, operands[1], operands[2]))"
+ [(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2)))]
+ "")
+
+(define_expand "reload_indi"
+ [(parallel [(match_operand:DI 0 "register_operand" "=a")
+ (match_operand:DI 1 "s390_plus_operand" "")
+ (match_operand:DI 2 "register_operand" "=&a")])]
+ "TARGET_64BIT"
+{
+ s390_expand_plus_operand (operands[0], operands[1], operands[2]);
+ DONE;
+})
+
;
; movsi instruction pattern(s).
;
[(set (match_dup 0) (match_dup 2))]
"operands[2] = get_pool_constant (operands[1]);")
+(define_insn "*la_31"
+ [(set (match_operand:SI 0 "register_operand" "=d,d")
+ (match_operand:QI 1 "address_operand" "U,W"))]
+ "!TARGET_64BIT && legitimate_la_operand_p (operands[1])"
+ "@
+ la\t%0,%a1
+ lay\t%0,%a1"
+ [(set_attr "op_type" "RX,RXY")
+ (set_attr "type" "la")])
+
+(define_peephole2
+ [(parallel
+ [(set (match_operand:SI 0 "register_operand" "")
+ (match_operand:QI 1 "address_operand" ""))
+ (clobber (reg:CC 33))])]
+ "!TARGET_64BIT
+ && strict_memory_address_p (VOIDmode, operands[1])
+ && preferred_la_operand_p (operands[1])"
+ [(set (match_dup 0) (match_dup 1))]
+ "")
+
+(define_peephole2
+ [(set (match_operand:SI 0 "register_operand" "")
+ (match_operand:SI 1 "register_operand" ""))
+ (parallel
+ [(set (match_dup 0)
+ (plus:SI (match_dup 0)
+ (match_operand:SI 2 "nonmemory_operand" "")))
+ (clobber (reg:CC 33))])]
+ "!TARGET_64BIT
+ && !reg_overlap_mentioned_p (operands[0], operands[2])
+ && strict_memory_address_p (VOIDmode, gen_rtx_PLUS (SImode, operands[1], operands[2]))
+ && preferred_la_operand_p (gen_rtx_PLUS (SImode, operands[1], operands[2]))"
+ [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))]
+ "")
+
+(define_insn "*la_31_and"
+ [(set (match_operand:SI 0 "register_operand" "=d,d")
+ (and:SI (match_operand:QI 1 "address_operand" "U,W")
+ (const_int 2147483647)))]
+ "!TARGET_64BIT"
+ "@
+ la\t%0,%a1
+ lay\t%0,%a1"
+ [(set_attr "op_type" "RX,RXY")
+ (set_attr "type" "la")])
+
+(define_insn_and_split "*la_31_and_cc"
+ [(set (match_operand:SI 0 "register_operand" "=d")
+ (and:SI (match_operand:QI 1 "address_operand" "p")
+ (const_int 2147483647)))
+ (clobber (reg:CC 33))]
+ "!TARGET_64BIT"
+ "#"
+ "&& reload_completed"
+ [(set (match_dup 0)
+ (and:SI (match_dup 1) (const_int 2147483647)))]
+ ""
+ [(set_attr "op_type" "RX")
+ (set_attr "type" "la")])
+
+(define_insn "force_la_31"
+ [(set (match_operand:SI 0 "register_operand" "=d,d")
+ (match_operand:QI 1 "address_operand" "U,W"))
+ (use (const_int 0))]
+ "!TARGET_64BIT"
+ "@
+ la\t%0,%a1
+ lay\t%0,%a1"
+ [(set_attr "op_type" "RX")
+ (set_attr "type" "la")])
+
+(define_expand "reload_insi"
+ [(parallel [(match_operand:SI 0 "register_operand" "=a")
+ (match_operand:SI 1 "s390_plus_operand" "")
+ (match_operand:SI 2 "register_operand" "=&a")])]
+ "!TARGET_64BIT"
+{
+ s390_expand_plus_operand (operands[0], operands[1], operands[2]);
+ DONE;
+})
+
;
; movhi instruction pattern(s).
;
""
"")
-(define_insn "*la_64"
- [(set (match_operand:DI 0 "register_operand" "=d,d")
- (match_operand:QI 1 "address_operand" "U,W"))]
- "TARGET_64BIT"
- "@
- la\t%0,%a1
- lay\t%0,%a1"
- [(set_attr "op_type" "RX,RXY")
- (set_attr "type" "la")])
-
-(define_peephole2
- [(parallel
- [(set (match_operand:DI 0 "register_operand" "")
- (match_operand:QI 1 "address_operand" ""))
- (clobber (reg:CC 33))])]
- "TARGET_64BIT
- && strict_memory_address_p (VOIDmode, operands[1])
- && preferred_la_operand_p (operands[1])"
- [(set (match_dup 0) (match_dup 1))]
- "")
-
-(define_peephole2
- [(set (match_operand:DI 0 "register_operand" "")
- (match_operand:DI 1 "register_operand" ""))
- (parallel
- [(set (match_dup 0)
- (plus:DI (match_dup 0)
- (match_operand:DI 2 "nonmemory_operand" "")))
- (clobber (reg:CC 33))])]
- "TARGET_64BIT
- && !reg_overlap_mentioned_p (operands[0], operands[2])
- && strict_memory_address_p (VOIDmode, gen_rtx_PLUS (DImode, operands[1], operands[2]))
- && preferred_la_operand_p (gen_rtx_PLUS (DImode, operands[1], operands[2]))"
- [(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2)))]
- "")
-
-(define_expand "reload_indi"
- [(parallel [(match_operand:DI 0 "register_operand" "=a")
- (match_operand:DI 1 "s390_plus_operand" "")
- (match_operand:DI 2 "register_operand" "=&a")])]
- "TARGET_64BIT"
-{
- s390_expand_plus_operand (operands[0], operands[1], operands[2]);
- DONE;
-})
-
-
;
; addsi3 instruction pattern(s).
;
ay\t%0,%2"
[(set_attr "op_type" "RR,RI,RX,RXY")])
-(define_insn "*la_31"
- [(set (match_operand:SI 0 "register_operand" "=d,d")
- (match_operand:QI 1 "address_operand" "U,W"))]
- "!TARGET_64BIT && legitimate_la_operand_p (operands[1])"
- "@
- la\t%0,%a1
- lay\t%0,%a1"
- [(set_attr "op_type" "RX,RXY")
- (set_attr "type" "la")])
-
-(define_peephole2
- [(parallel
- [(set (match_operand:SI 0 "register_operand" "")
- (match_operand:QI 1 "address_operand" ""))
- (clobber (reg:CC 33))])]
- "!TARGET_64BIT
- && strict_memory_address_p (VOIDmode, operands[1])
- && preferred_la_operand_p (operands[1])"
- [(set (match_dup 0) (match_dup 1))]
- "")
-
-(define_peephole2
- [(set (match_operand:SI 0 "register_operand" "")
- (match_operand:SI 1 "register_operand" ""))
- (parallel
- [(set (match_dup 0)
- (plus:SI (match_dup 0)
- (match_operand:SI 2 "nonmemory_operand" "")))
- (clobber (reg:CC 33))])]
- "!TARGET_64BIT
- && !reg_overlap_mentioned_p (operands[0], operands[2])
- && strict_memory_address_p (VOIDmode, gen_rtx_PLUS (SImode, operands[1], operands[2]))
- && preferred_la_operand_p (gen_rtx_PLUS (SImode, operands[1], operands[2]))"
- [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))]
- "")
-
-(define_insn "*la_31_and"
- [(set (match_operand:SI 0 "register_operand" "=d,d")
- (and:SI (match_operand:QI 1 "address_operand" "U,W")
- (const_int 2147483647)))]
- "!TARGET_64BIT"
- "@
- la\t%0,%a1
- lay\t%0,%a1"
- [(set_attr "op_type" "RX,RXY")
- (set_attr "type" "la")])
-
-(define_insn_and_split "*la_31_and_cc"
- [(set (match_operand:SI 0 "register_operand" "=d")
- (and:SI (match_operand:QI 1 "address_operand" "p")
- (const_int 2147483647)))
- (clobber (reg:CC 33))]
- "!TARGET_64BIT"
- "#"
- "&& reload_completed"
- [(set (match_dup 0)
- (and:SI (match_dup 1) (const_int 2147483647)))]
- ""
- [(set_attr "op_type" "RX")
- (set_attr "type" "la")])
-
-(define_insn "force_la_31"
- [(set (match_operand:SI 0 "register_operand" "=d,d")
- (match_operand:QI 1 "address_operand" "U,W"))
- (use (const_int 0))]
- "!TARGET_64BIT"
- "@
- la\t%0,%a1
- lay\t%0,%a1"
- [(set_attr "op_type" "RX")
- (set_attr "type" "la")])
-
-(define_expand "reload_insi"
- [(parallel [(match_operand:SI 0 "register_operand" "=a")
- (match_operand:SI 1 "s390_plus_operand" "")
- (match_operand:SI 2 "register_operand" "=&a")])]
- "!TARGET_64BIT"
-{
- s390_expand_plus_operand (operands[0], operands[1], operands[2]);
- DONE;
-})
-
-
;
; adddf3 instruction pattern(s).
;