* i386.h (pinsrw): Add.

	(pshufw): Remove.
	(cvttpd2dq): Fix operands.
	(cvttps2dq): Likewise.
	(movq2q): Rename to movdq2q.

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 561eeacd1175c0b11807976198be72686189e3c9..2a545d5b0d52ee6682fb876de9f25f3931bb194d 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,11 @@
+Wed Jan 10 15:30:57 MET 2001  Jan Hubicka  <jh@suse.cz>
+
+       * i386.h (pinsrw): Add.
+       (pshufw): Remove.
+       (cvttpd2dq): Fix operands.
+       (cvttps2dq): Likewise.
+       (movq2q): Rename to movdq2q.
+
 2001-01-10  Richard Schaal  <richard.schaal@intel.com>
 
        * i386.h: Correct movnti instruction.

diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index 27e73fd66bcec558a71717acc678c0cd1ee649c7..d095e5baab3d09b775b851262fbece749fcf5014 100644 (file)
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -1148,6 +1148,7 @@ static const template i386_optab[] = {
 {"pextrw",    3, 0x0fc5,    X, CpuSSE, FP|Modrm,       { Imm8, RegMMX, Reg32|InvMem } },
 {"pextrw",    3, 0x660fc5,  X, CpuSSE2,FP|Modrm,       { Imm8, RegXMM, Reg32|InvMem } },
 {"pinsrw",    3, 0x0fc4,    X, CpuSSE, FP|Modrm,       { Imm8, Reg32|ShortMem, RegMMX } },
+{"pinsrw",    3, 0x660fc4,  X, CpuSSE2, FP|Modrm,      { Imm8, Reg32|ShortMem, RegXMM } },
 {"pmaxsw",    2, 0x0fee,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
 {"pmaxsw",    2, 0x660fee,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
 {"pmaxub",    2, 0x0fde,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
@@ -1167,7 +1168,6 @@ static const template i386_optab[] = {
 {"psadbw",    2, 0x0ff6,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
 {"psadbw",    2, 0x660ff6,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
 {"pshufw",    3, 0x0f70,    X, CpuSSE, FP|Modrm,       { Imm8, RegMMX|LLongMem, RegMMX } },
-{"pshufw",    3, 0x660f70,  X, CpuSSE2,FP|Modrm,       { Imm8, RegXMM|LLongMem, RegXMM } },
 {"rcpps",     2, 0x0f53,    X, CpuSSE, FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
 {"rcpss",     2, 0xf30f53,  X, CpuSSE, FP|Modrm,       { RegXMM|WordMem, RegXMM, 0 } },
 {"rsqrtps",   2, 0x0f52,    X, CpuSSE, FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
@@ -1253,14 +1253,14 @@ static const template i386_optab[] = {
 {"cvtss2sd",  2, 0xf30f5a,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"cvttpd2pi", 2, 0x660f2c,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegMMX, 0 } },
 {"cvttsd2si", 2, 0xf20f2c,  X, CpuSSE2, FP|Modrm,      { RegXMM|WordMem, Reg32, 0 } },
-{"cvttpd2dq", 2, 0x660fe6,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegMMX, 0 } },
-{"cvttps2dq", 2, 0xf30f5b,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegMMX, 0 } },
+{"cvttpd2dq", 2, 0x660fe6,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
+{"cvttps2dq", 2, 0xf30f5b,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"maskmovdqu",2, 0x660ff7,  X, CpuSSE2, FP|Modrm,      { RegXMM, RegXMM, 0 } },
 {"movdqa",    2, 0x660f6f,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"movdqa",    2, 0x660f7f,  X, CpuSSE2, FP|Modrm,      { RegXMM, RegXMM|LLongMem, 0 } },
 {"movdqu",    2, 0xf30f6f,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"movdqu",    2, 0xf30f7f,  X, CpuSSE2, FP|Modrm,      { RegXMM, RegXMM|LLongMem, 0 } },
-{"movq2q",    2, 0xf20fd6,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
+{"movdq2q",    2, 0xf20fd6,  X, CpuSSE2, FP|Modrm,     { RegMMX|LLongMem, RegXMM, 0 } },
 {"movq2dq",   2, 0xf30fd6,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegMMX, 0 } },
 {"pmuludq",   2, 0x0ff4,    X, CpuSSE2, FP|Modrm,      { RegMMX|LongMem, RegMMX, 0 } },
 {"pmuludq",   2, 0x660ff4,  X, CpuSSE2, FP|Modrm,      { RegXMM|LongMem, RegXMM, 0 } },