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diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index 60b8e2adc3dab9c2dff0844bc3a48a8993326ad6..50939b6b542432303dccb9e426f4e541b749e408 100644 (file)
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -127,8 +127,14 @@ There is considerable opcode pressure, consequently to set MVL and VL
 from different sources is as follows:
 
 | condition           | effect         |
-| - | |
-| `vf=1, RA=0, RT!=0` | VL set from CTR |
+| - | - |
+| `vf=1, RA=0, RT!=0` | VL,RT set to MIN(MVL, CTR)  |
+| `vf=1, RA=0, RT=0`  | VL set to MIN(MVL, SVi+1)  |
+| `vf=1, RA!=0, RT=0` | VL set to MIN(MVL, RA)  |
+| `vf=1, RA!=0, RT!=0` | VL,RT set to MIN(MVL, RA)  |
+
+The reasoning here is that the opportunity to set RT equal to the
+immediate `SVi+1` is sacrificed in favour of setting from CTR.
 
 # Vertical First Mode