handleATOM(dst0, dstTy, tgsi::opcodeToSubOp(tgsi.getOpcode()));
break;
case TGSI_OPCODE_RESQ:
- geni = mkOp1(OP_SUQ, TYPE_U32, dst0[0],
+ geni = mkOp1(OP_BUFQ, TYPE_U32, dst0[0],
makeSym(TGSI_FILE_BUFFER, tgsi.getSrc(0).getIndex(0), -1, 0, 0));
if (tgsi.getSrc(0).isIndirect(0))
geni->setIndirect(0, 1, fetchSrc(tgsi.getSrc(0).getIndirect(0), 0, 0));
}
bool
-NVC0LoweringPass::handleSUQ(Instruction *suq)
+NVC0LoweringPass::handleBUFQ(Instruction *bufq)
{
- suq->op = OP_MOV;
- suq->setSrc(0, loadBufLength32(suq->getIndirect(0, 1),
- suq->getSrc(0)->reg.fileIndex * 16));
- suq->setIndirect(0, 0, NULL);
- suq->setIndirect(0, 1, NULL);
+ bufq->op = OP_MOV;
+ bufq->setSrc(0, loadBufLength32(bufq->getIndirect(0, 1),
+ bufq->getSrc(0)->reg.fileIndex * 16));
+ bufq->setIndirect(0, 0, NULL);
+ bufq->setIndirect(0, 1, NULL);
return true;
}
}
}
+bool
+NVC0LoweringPass::handleSUQ(Instruction *suq)
+{
+ /* TODO: will be updated in the next commit. */
+ return true;
+}
+
void
NVC0LoweringPass::adjustCoordinatesMS(TexInstruction *tex)
{
case OP_SUQ:
handleSUQ(i);
break;
+ case OP_BUFQ:
+ handleBUFQ(i);
+ break;
default:
break;
}
void handleSharedATOM(Instruction *);
void handleSharedATOMNVE4(Instruction *);
void handleLDST(Instruction *);
+ bool handleBUFQ(Instruction *);
void checkPredicate(Instruction *);