bool clk_polarity, en_polarity;
RTLIL::SigSpec clk_sig, en_sig;
+dict<int, std::string> pi_map, po_map;
int map_signal(RTLIL::SigBit bit, gate_type_t gate_type = G(NONE), int in1 = -1, int in2 = -1, int in3 = -1, int in4 = -1)
{
void next_line(const std::string &line)
{
+ int pi, po;
+ if (sscanf(line.c_str(), "Start-point = pi%d. End-point = po%d.", &pi, &po) == 2) {
+ log("ABC: Start-point = pi%d (%s). End-point = po%d (%s).\n",
+ pi, pi_map.count(pi) ? pi_map.at(pi).c_str() : "???",
+ po, po_map.count(po) ? po_map.at(po).c_str() : "???");
+ return;
+ }
+
for (char ch : line)
next_char(ch);
}
signal_map.clear();
signal_list.clear();
+ pi_map.clear();
+ po_map.clear();
recover_init = false;
if (clk_str != "$")
if (!si.is_port || si.type != G(NONE))
continue;
fprintf(f, " n%d", si.id);
- count_input++;
+ pi_map[count_input++] = log_signal(si.bit);
}
if (count_input == 0)
fprintf(f, " dummy_input\n");
if (!si.is_port || si.type == G(NONE))
continue;
fprintf(f, " n%d", si.id);
- count_output++;
+ po_map[count_output++] = log_signal(si.bit);
}
fprintf(f, "\n");
signal_list.clear();
signal_map.clear();
signal_init.clear();
+ pi_map.clear();
+ po_map.clear();
#ifdef ABCEXTERNAL
std::string exe_file = ABCEXTERNAL;
signal_list.clear();
signal_map.clear();
signal_init.clear();
+ pi_map.clear();
+ po_map.clear();
log_pop();
}