Revert "i965/gen9: Enable rep clears on gen9"
authorBen Widawsky <benjamin.widawsky@intel.com>
Wed, 14 Oct 2015 03:50:24 +0000 (20:50 -0700)
committerBen Widawsky <benjamin.widawsky@intel.com>
Fri, 20 Nov 2015 19:45:32 +0000 (11:45 -0800)
This reverts commit 8a0c85b25853decb4a110b6d36d79c4f095d437b.

It's not a strict revert because I don't want to bring back the gen < 9 check at
this point in time.

Reviewed-by: Neil Roberts <neil@linux.intel.com>
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c

index 7bf68194b71064d467b9a580fcb5a28992e2b284..f3c256d11db7e9ed67bf45d0f4ed443f1e5a0c89 100644 (file)
@@ -525,11 +525,6 @@ brw_meta_fast_clear(struct brw_context *brw, struct gl_framebuffer *fb,
       if (irb->mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_NO_MCS)
          clear_type = REP_CLEAR;
 
-      if (brw->gen >= 9 && clear_type == FAST_CLEAR) {
-         perf_debug("fast MCS clears are disabled on gen9");
-         clear_type = REP_CLEAR;
-      }
-
       /* We can't do scissored fast clears because of the restrictions on the
        * fast clear rectangle size.
        */