(no commit message)

diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn
index e2cbff9d36bc909ba46c42e7d5aed51a06444c14..255b9f3061e614b17fd22fa4513d6a1ee64a20c3 100644 (file)
--- a/openpower/sv/svp_rewrite/svp64.mdwn
+++ b/openpower/sv/svp_rewrite/svp64.mdwn
@@ -82,11 +82,12 @@ at the LSB.
 The mapping from the OpenPower v3.1 prefix bits to the Remapped Encoding
 is defined in the Prefix Fields section.
 
-## Prefix Opcode Map (64-bit instruction encoding) (prefix bits 6:11)
+## Prefix Opcode Map (64-bit instruction encoding)
 
-shows both PowerISA v3.1 instructions as well as new SVP instructions;
-empty spaces are yet-to-be-allocated Illegal Instructions.  The original
-table in the v3.1B OpenPOWER ISA Spec is on p1350, Table 12.
+In the original table in the v3.1B OpenPOWER ISA Spec on p1350, Table 12, prefix bits 6:11 are shown, with their allocations to different v3.1B pregix "modes".
+
+The table below hows both PowerISA v3.1 instructions as well as new SVP instructions fit;
+empty spaces are yet-to-be-allocated Illegal Instructions.  
 
 | 6:11 | ---000 | ---001 | ---010 | ---011 | ---100 | ---101 | ---110 | ---111 |
 |------|--------|--------|--------|--------|--------|--------|--------|--------|