freedreno/a6xx: scissor fixes
authorRob Clark <robdclark@gmail.com>
Wed, 15 Aug 2018 18:04:12 +0000 (14:04 -0400)
committerRob Clark <robdclark@gmail.com>
Fri, 17 Aug 2018 15:04:21 +0000 (11:04 -0400)
Signed-off-by: Rob Clark <robdclark@gmail.com>
src/gallium/drivers/freedreno/a6xx/fd6_draw.c
src/gallium/drivers/freedreno/a6xx/fd6_gmem.c

index e4d44683ca7e38eb6cb3acde2a414c7035b8c2b1..5c5667515ce27eac86e082bac491ffad208d0dc5 100644 (file)
@@ -361,8 +361,8 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
        OUT_PKT4(ring, REG_A6XX_RB_BLIT_SCISSOR_TL, 2);
        OUT_RING(ring, A6XX_RB_BLIT_SCISSOR_TL_X(scissor->minx) |
                         A6XX_RB_BLIT_SCISSOR_TL_Y(scissor->miny));
-       OUT_RING(ring, A6XX_RB_BLIT_SCISSOR_BR_X(scissor->maxx) |
-                        A6XX_RB_BLIT_SCISSOR_BR_Y(scissor->maxy));
+       OUT_RING(ring, A6XX_RB_BLIT_SCISSOR_BR_X(scissor->maxx - 1) |
+                        A6XX_RB_BLIT_SCISSOR_BR_Y(scissor->maxy - 1));
 
        if (buffers & PIPE_CLEAR_COLOR) {
                for (int i = 0; i < pfb->nr_cbufs; i++) {
index dd0f16a2bccb93ca9e6500c162940899f9857c93..fdffc692b2a5e1744afa0beb927c6d813e564ed0 100644 (file)
@@ -548,8 +548,8 @@ set_blit_scissor(struct fd_batch *batch)
                         A6XX_RB_BLIT_SCISSOR_TL_X(blit_scissor.minx) |
                         A6XX_RB_BLIT_SCISSOR_TL_Y(blit_scissor.miny));
        OUT_RING(ring,
-                        A6XX_RB_BLIT_SCISSOR_BR_X(blit_scissor.maxx) |
-                        A6XX_RB_BLIT_SCISSOR_BR_Y(blit_scissor.maxy));
+                        A6XX_RB_BLIT_SCISSOR_BR_X(blit_scissor.maxx - 1) |
+                        A6XX_RB_BLIT_SCISSOR_BR_Y(blit_scissor.maxy - 1));
 }
 
 static void