"IX86_EXPAND_BINARY_OPERATOR (PLUS, HImode, operands);")
(define_insn ""
- [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
- (plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
- (match_operand:HI 2 "general_operand" "ri,rm")))]
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,?r")
+ (plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,r")
+ (match_operand:HI 2 "general_operand" "ri,rm,ri")))]
"ix86_binary_operator_ok (PLUS, HImode, operands)"
"*
{
+ if (REG_P (operands[0]) && REG_P (operands[1])
+ && (REG_P (operands[2]) || CONSTANT_P (operands[2]))
+ && REGNO (operands[0]) != REGNO (operands[1]))
+ {
+ if (operands[2] == stack_pointer_rtx)
+ abort ();
+
+ CC_STATUS_INIT;
+ operands[1]
+ = gen_rtx_PLUS (SImode,
+ gen_rtx_REG (SImode, REGNO (operands[1])),
+ (! REG_P (operands[2])
+ ? operands[2]
+ : gen_rtx_REG (SImode, REGNO (operands[2]))));
+ operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
+ return AS2 (lea%L0,%a1,%0);
+ }
+
/* ??? what about offsettable memory references? */
if (!TARGET_PENTIUMPRO /* partial stalls are just too painful to risk. */
&& QI_REG_P (operands[0])
"IX86_EXPAND_BINARY_OPERATOR (PLUS, QImode, operands);")
(define_insn ""
- [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q")
- (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
- (match_operand:QI 2 "general_operand" "qn,qmn")))]
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,?q")
+ (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,q")
+ (match_operand:QI 2 "general_operand" "qn,qmn,qn")))]
"ix86_binary_operator_ok (PLUS, QImode, operands)"
"*
{
+ if (REG_P (operands[0]) && REG_P (operands[1])
+ && (REG_P (operands[2]) || CONSTANT_P (operands[2]))
+ && (REGNO (operands[0]) != REGNO (operands[1])
+ || NON_QI_REG_P (operands[1])
+ || (REG_P (operands[2]) && NON_QI_REG_P (operands[2]))))
+ {
+ if (operands[2] == stack_pointer_rtx)
+ abort ();
+
+ CC_STATUS_INIT;
+ operands[1]
+ = gen_rtx_PLUS (SImode,
+ gen_rtx_REG (SImode, REGNO (operands[1])),
+ (! REG_P (operands[2])
+ ? operands[2]
+ : gen_rtx_REG (SImode, REGNO (operands[2]))));
+ operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
+ return AS2 (lea%L0,%a1,%0);
+ }
if (operands[2] == const1_rtx)
return AS1 (inc%B0,%0);