(CPP_SPEC): Remove CPU name synonyms.

From-SVN: r10079

diff --git a/gcc/config/rs6000/eabile.h b/gcc/config/rs6000/eabile.h
index 424c11a4f76a36346e73c0ef9fc0664ad34846ca..79d043a3887fd623525378c09f3da89381918d80 100644 (file)
--- a/gcc/config/rs6000/eabile.h
+++ b/gcc/config/rs6000/eabile.h
@@ -47,14 +47,6 @@ Boston, MA 02111-1307, USA.  */
 %{mcpu=rsc: -D_ARCH_PWR} \
 %{mcpu=rsc1: -D_ARCH_PWR} \
 %{mcpu=403: -D_ARCH_PPC} \
-%{mcpu=mpc403: -D_ARCH_PPC} \
-%{mcpu=ppc403: -D_ARCH_PPC} \
 %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \
 %{mcpu=603: -D_ARCH_PPC} \
-%{mcpu=mpc603: -D_ARCH_PPC} \
-%{mcpu=ppc603: -D_ARCH_PPC} \
-%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=mpc604: -D_ARCH_PPC} \
-%{mcpu=ppc604: -D_ARCH_PPC}"
+%{mcpu=604: -D_ARCH_PPC}"

diff --git a/gcc/config/rs6000/powerpc.h b/gcc/config/rs6000/powerpc.h
index fc9d2370a4b1d2be49ab377dcfced69983c72bc0..e8f6a17168a43a992625a602a2b3ce610d0a50d0 100644 (file)
--- a/gcc/config/rs6000/powerpc.h
+++ b/gcc/config/rs6000/powerpc.h
@@ -24,7 +24,26 @@ Boston, MA 02111-1307, USA.  */
 #include "rs6000/rs6000.h"
 
 #undef ASM_SPEC
-#define ASM_SPEC "-u -mppc"
+#define ASM_SPEC "-u \
+%{!mcpu*: \
+  %{mpower2: -mpwrx} \
+  %{mpowerpc*: %{!mpower: -mppc}} \
+  %{mno-powerpc: %{!mpower: %{!mpower2: -mcom}}} \
+  %{mno-powerpc: %{mpower: %{!mpower2: -mpwr}}} \
+  %{!mno-powerpc: %{mpower: -m601}} \
+  %{!mno-powerpc: %{!mpower: -mppc}}} \
+%{mcpu=common: -mcom} \
+%{mcpu=power: -mpwr} \
+%{mcpu=powerpc: -mppc} \
+%{mcpu=rios: -mpwr} \
+%{mcpu=rios1: -mpwr} \
+%{mcpu=rios2: -mpwrx} \
+%{mcpu=rsc: -mpwr} \
+%{mcpu=rsc1: -mpwr} \
+%{mcpu=403: -mppc} \
+%{mcpu=601: -m601} \
+%{mcpu=603: -mppc} \
+%{mcpu=604: -mppc}"
 
 #undef CPP_PREDEFINES
 #define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \
@@ -48,17 +67,9 @@ Boston, MA 02111-1307, USA.  */
 %{mcpu=rsc: -D_ARCH_PWR} \
 %{mcpu=rsc1: -D_ARCH_PWR} \
 %{mcpu=403: -D_ARCH_PPC} \
-%{mcpu=mpc403: -D_ARCH_PPC} \
-%{mcpu=ppc403: -D_ARCH_PPC} \
 %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \
 %{mcpu=603: -D_ARCH_PPC} \
-%{mcpu=mpc603: -D_ARCH_PPC} \
-%{mcpu=ppc603: -D_ARCH_PPC} \
-%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=mpc604: -D_ARCH_PPC} \
-%{mcpu=ppc604: -D_ARCH_PPC}"
+%{mcpu=604: -D_ARCH_PPC}"
 
 #undef TARGET_DEFAULT
 #define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS)

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 7d5f36ab459a0e9428aea083453bd8b821727d4c..59f60a65f36b4c09409ff21812f1ba67ebf7634b 100644 (file)
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -62,17 +62,9 @@ Boston, MA 02111-1307, USA.  */
 %{mcpu=rsc: -D_ARCH_PWR} \
 %{mcpu=rsc1: -D_ARCH_PWR} \
 %{mcpu=403: -D_ARCH_PPC} \
-%{mcpu=mpc403: -D_ARCH_PPC} \
-%{mcpu=ppc403: -D_ARCH_PPC} \
 %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \
 %{mcpu=603: -D_ARCH_PPC} \
-%{mcpu=mpc603: -D_ARCH_PPC} \
-%{mcpu=ppc603: -D_ARCH_PPC} \
-%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=mpc604: -D_ARCH_PPC} \
-%{mcpu=ppc604: -D_ARCH_PPC}"
+%{mcpu=604: -D_ARCH_PPC}"
 
 /* Define the options for the binder: Start text at 512, align all segments
    to 512 bytes, and warn if there is text relocation.

diff --git a/gcc/config/rs6000/sysv4le.h b/gcc/config/rs6000/sysv4le.h
index 2b184ca0771519efae4ed7226abcf35406fd6af6..c72bdb05626b138c46b028a38c450ba5f7789b62 100644 (file)
--- a/gcc/config/rs6000/sysv4le.h
+++ b/gcc/config/rs6000/sysv4le.h
@@ -47,14 +47,6 @@ Boston, MA 02111-1307, USA.  */
 %{mcpu=rsc: -D_ARCH_PWR} \
 %{mcpu=rsc1: -D_ARCH_PWR} \
 %{mcpu=403: -D_ARCH_PPC} \
-%{mcpu=mpc403: -D_ARCH_PPC} \
-%{mcpu=ppc403: -D_ARCH_PPC} \
 %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \
 %{mcpu=603: -D_ARCH_PPC} \
-%{mcpu=mpc603: -D_ARCH_PPC} \
-%{mcpu=ppc603: -D_ARCH_PPC} \
-%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=mpc604: -D_ARCH_PPC} \
-%{mcpu=ppc604: -D_ARCH_PPC}"
+%{mcpu=604: -D_ARCH_PPC}"