// TODO: move SV_ELWIDTH_TEST to sv_test_macros.h
// TODO: probably remove testing of x15 and x16 (or pass in as extra args?)
-#define SV_ELWIDTH_TEST( wid1, wid2, wid3, expect1, expect2, expect3 ) \
+#define SV_ELWIDTH_TEST( wid1, wid2, wid3, isvec1, isvec2, isvec3, \
+ expect1, expect2, expect3 ) \
\
SV_LDD_DATA( x12, testdata , 0); \
SV_LDD_DATA( x13, testdata+8 , 0); \
li x30, 0xa5a5a5a5a5a5a5a5; \
\
SET_SV_MVL( 3); \
- SET_SV_3CSRS( SV_REG_CSR( 1, 15, wid1, 15, 1), \
- SV_REG_CSR( 1, 12, wid2, 12, 1), \
- SV_REG_CSR( 1, 28, wid3, 28, 1)); \
+ SET_SV_3CSRS( SV_REG_CSR( 1, 15, wid1, 15, isvec1), \
+ SV_REG_CSR( 1, 12, wid2, 12, isvec2), \
+ SV_REG_CSR( 1, 28, wid3, 28, isvec3)); \
SET_SV_VL( 3); \
\
addw x28, x15, x12; \
RVTEST_CODE_BEGIN # Start of test code.
# TODO: add "addw" argument, add testdata argument
- SV_ELWIDTH_TEST( 0, 0, 0,
+ SV_ELWIDTH_TEST( 0, 0, 0, 1, 1, 1,
0xffffffff8b6bab8b, 0xffffffff88684828, 0x0000000000000000 )
- SV_ELWIDTH_TEST( 0, 0, 3,
+ SV_ELWIDTH_TEST( 0, 0, 3, 1, 1, 1,
0x886848288b6bab8b, 0xa5a5a5a500000000, 0xa5a5a5a5a5a5a5a5 )
- SV_ELWIDTH_TEST( 1, 1, 0,
+ SV_ELWIDTH_TEST( 1, 1, 0, 1, 1, 1,
0xffffffffffffff8b, 0xffffffffffffffab, 0x000000000000006b )
- SV_ELWIDTH_TEST( 1, 1, 3,
+ SV_ELWIDTH_TEST( 1, 1, 3, 1, 1, 1,
0xffffffabffffff8b, 0xa5a5a5a50000006b, 0xa5a5a5a5a5a5a5a5 )
- SV_ELWIDTH_TEST( 1, 1, 2,
+ SV_ELWIDTH_TEST( 1, 1, 2, 1, 1, 1,
0xa5a5006bffabff8b, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 )
- SV_ELWIDTH_TEST( 1, 1, 1,
+ SV_ELWIDTH_TEST( 1, 1, 1, 1, 1, 1,
0xa5a5a5a5a56bab8b, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 )
RVTEST_PASS # Signal success.
RVTEST_RV64U # Define TVM used by program.
-#define SV_ELWIDTH_TEST( sinst, vl, elwidth, wid1, wid2, \
+#define SV_ELWIDTH_TEST( sinst, vl, elwidth, wid1, wid2, isvec1, isvec2, \
testdata, expect1, expect2, expect3 ) \
\
la x12, testtarget ; \
ld x30, (testdata+elwidth*2); \
\
SET_SV_MVL( vl); \
- SET_SV_2CSRS( SV_REG_CSR( 1, 12, wid1, 12, 1), \
- SV_REG_CSR( 1, 28, wid2, 28, 1)); \
+ SET_SV_2CSRS( SV_REG_CSR( 1, 12, wid1, 12, isvec1), \
+ SV_REG_CSR( 1, 28, wid2, 28, isvec2)); \
SET_SV_VL( vl ); \
\
sinst x28, 0(x12); \
# Test code region.
RVTEST_CODE_BEGIN # Start of test code.
- SV_ELWIDTH_TEST( sd , 2, 8, SV_W_DFLT, SV_W_DFLT, testdata1,
+ SV_ELWIDTH_TEST( sd , 2, 8, SV_W_DFLT, SV_W_DFLT, 1, 1, testdata1,
0x8979695949392919, 0x8777675747372717, 0xa5a5a5a5a5a5a5a5 )
- SV_ELWIDTH_TEST( sd , 3, 8, SV_W_DFLT, SV_W_DFLT, testdata1,
+ SV_ELWIDTH_TEST( sd , 3, 8, SV_W_DFLT, SV_W_DFLT, 1, 1, testdata1,
0x8979695949392919, 0x8777675747372717, 0x8676665646362616 )
- SV_ELWIDTH_TEST( sd , 3, 8, SV_W_16BIT, SV_W_DFLT, testdata1,
+ SV_ELWIDTH_TEST( sd , 3, 8, SV_W_16BIT, SV_W_DFLT, 1, 1, testdata1,
0xa5a5261627172919, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 )
- SV_ELWIDTH_TEST( sd , 5, 8, SV_W_16BIT, SV_W_32BIT, testdata1,
+ SV_ELWIDTH_TEST( sd , 5, 8, SV_W_16BIT, SV_W_32BIT, 1, 1, testdata1,
0x6757271769592919, 0xa5a5a5a5a5a52616, 0xa5a5a5a5a5a5a5a5 )
- SV_ELWIDTH_TEST( sd , 5, 8, SV_W_32BIT, SV_W_16BIT, testdata1,
+ SV_ELWIDTH_TEST( sd , 5, 8, SV_W_32BIT, SV_W_16BIT, 1, 1, testdata1,
0x0000493900002919, 0x0000897900006959, 0xa5a5a5a500002717 )
- SV_ELWIDTH_TEST( sd , 7, 8, SV_W_16BIT, SV_W_8BIT, testdata1,
+ SV_ELWIDTH_TEST( sd , 7, 8, SV_W_16BIT, SV_W_8BIT, 1, 1, testdata1,
0x0049003900290019, 0xa5a5007900690059, 0xa5a5a5a5a5a5a5a5 )
- SV_ELWIDTH_TEST( sd , 11, 8, SV_W_8BIT, SV_W_16BIT, testdata1,
+ SV_ELWIDTH_TEST( sd , 11, 8, SV_W_8BIT, SV_W_16BIT, 1, 1, testdata1,
0x7757371779593919, 0xa5a5a5a5a5563616, 0xa5a5a5a5a5a5a5a5 )
RVTEST_PASS # Signal success.
fail: