i965: Remove some dead code.
authorKenneth Graunke <kenneth@whitecape.org>
Fri, 28 Jun 2013 23:06:26 +0000 (16:06 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Wed, 3 Jul 2013 17:48:13 +0000 (10:48 -0700)
A random smattering of things that just aren't used anymore.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
17 files changed:
src/mesa/drivers/dri/i965/brw_clip.h
src/mesa/drivers/dri/i965/brw_draw.h
src/mesa/drivers/dri/i965/brw_gs.h
src/mesa/drivers/dri/i965/brw_reg.h
src/mesa/drivers/dri/i965/brw_structs.h
src/mesa/drivers/dri/i965/brw_util.h
src/mesa/drivers/dri/i965/intel_blit.h
src/mesa/drivers/dri/i965/intel_buffers.c
src/mesa/drivers/dri/i965/intel_buffers.h
src/mesa/drivers/dri/i965/intel_chipset.h
src/mesa/drivers/dri/i965/intel_context.h
src/mesa/drivers/dri/i965/intel_extensions.h
src/mesa/drivers/dri/i965/intel_fbo.c
src/mesa/drivers/dri/i965/intel_fbo.h
src/mesa/drivers/dri/i965/intel_mipmap_tree.h
src/mesa/drivers/dri/i965/intel_regions.h
src/mesa/drivers/dri/i965/intel_tex.h

index 26bcb3a25f92a9b6f864023e19b54c3e60a49fa2..02259d48f6dfee1ba61d6323441507ab64674bd2 100644 (file)
@@ -122,8 +122,6 @@ struct brw_clip_compile {
    struct brw_vue_map vue_map;
 };
 
-#define ATTR_SIZE  (4*4)
-
 /**
  * True if the given varying is one of the outputs of the vertex shader.
  */
index d86a9e72cbb2c804a74089751210a47b7d8e4305..c915bc37db241ed3df01c24038f360b9a0159be7 100644 (file)
@@ -46,11 +46,6 @@ void brw_draw_prims( struct gl_context *ctx,
 void brw_draw_init( struct brw_context *brw );
 void brw_draw_destroy( struct brw_context *brw );
 
-/* brw_draw_current.c
- */
-void brw_init_current_values(struct gl_context *ctx,
-                            struct gl_client_array *arrays);
-
 /* brw_primitive_restart.c */
 GLboolean
 brw_handle_primitive_restart(struct gl_context *ctx,
index 9a901d55cc013bb4009e823ace5ab7895c20526a..319f10521fe3d6ab7d21e7dca20caab28f528c3f 100644 (file)
@@ -102,8 +102,6 @@ struct brw_gs_compile {
    struct brw_vue_map vue_map;
 };
 
-#define ATTR_SIZE  (4*4)
-
 void brw_gs_quads( struct brw_gs_compile *c, struct brw_gs_prog_key *key );
 void brw_gs_quad_strip( struct brw_gs_compile *c, struct brw_gs_prog_key *key );
 void brw_gs_lines( struct brw_gs_compile *c );
index 9ac25442eec03169521ed288e7783d9e38c2f30b..db29df91e7cb2f0f73555aaea85d1fa223d28e7d 100644 (file)
@@ -778,13 +778,6 @@ brw_indirect(unsigned addr_subnr, int offset)
    return ptr;
 }
 
-/** Do two brw_regs refer to the same register? */
-static inline bool
-brw_same_reg(struct brw_reg r1, struct brw_reg r2)
-{
-   return r1.file == r2.file && r1.nr == r2.nr;
-}
-
 void brw_print_reg(struct brw_reg reg);
 
 #ifdef __cplusplus
index c322edfbdcfaa0bde9f6a46d9769aad0abc99b3f..6e5a6822839a698798174b6584a7611934ef34ae 100644 (file)
 #ifndef BRW_STRUCTS_H
 #define BRW_STRUCTS_H
 
-/* These seem to be passed around as function args, so it works out
- * better to keep them as #defines:
- */
-#define BRW_FLUSH_READ_CACHE           0x1
-#define BRW_FLUSH_STATE_CACHE          0x2
-#define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4
-#define BRW_FLUSH_SNAPSHOT_COUNTERS    0x8
-
 struct brw_urb_fence
 {
    struct
@@ -774,29 +766,6 @@ struct gen7_sf_clip_viewport {
    GLfloat pad1[4];
 };
 
-struct brw_vertex_element_state
-{
-   struct
-   {
-      GLuint src_offset:11; 
-      GLuint pad:5;
-      GLuint src_format:9; 
-      GLuint pad0:1;
-      GLuint valid:1; 
-      GLuint vertex_buffer_index:5; 
-   } ve0;
-   
-   struct
-   {
-      GLuint dst_offset:8; 
-      GLuint pad:8;
-      GLuint vfcomponent3:4; 
-      GLuint vfcomponent2:4; 
-      GLuint vfcomponent1:4; 
-      GLuint vfcomponent0:4; 
-   } ve1;
-};
-
 struct brw_urb_immediate {
    GLuint opcode:4;
    GLuint offset:6;
index 5cba99a930619c8273209bd68b95ef2cd94a1207..f1e08711f758e6b56df7ddff778a60cf76154da7 100644 (file)
@@ -36,7 +36,6 @@
 #include "main/mtypes.h"
 #include "main/imports.h"
 
-extern GLuint brw_parameter_list_state_flags(struct gl_program_parameter_list *paramList);
 extern GLuint brw_translate_blend_factor( GLenum factor );
 extern GLuint brw_translate_blend_equation( GLenum mode );
 extern GLenum brw_fix_xRGB_alpha(GLenum function);
index 12499c904b9cb770e5ad10681ed5172f244b1098..3dc95d266b9b48d03ed7bb4e901fdea697687b5d 100644 (file)
@@ -30,9 +30,6 @@
 
 #include "intel_context.h"
 
-extern void intelCopyBuffer(const __DRIdrawable * dpriv,
-                            const drm_clip_rect_t * rect);
-
 bool
 intelEmitCopyBlit(struct intel_context *intel,
                               GLuint cpp,
index 6bb0d0f5cb5ae98a026f6564f302c7d5a458b426..6e6be6af4e93f678e9c563ac5a55d4a242db83e0 100644 (file)
 #include "main/framebuffer.h"
 #include "main/renderbuffer.h"
 
-/**
- * Return pointer to current color reading region, or NULL.
- */
-struct intel_region *
-intel_readbuf_region(struct intel_context *intel)
-{
-   struct intel_renderbuffer *irb
-      = intel_renderbuffer(intel->ctx.ReadBuffer->_ColorReadBuffer);
-   if (irb && irb->mt)
-      return irb->mt->region;
-   else
-      return NULL;
-}
-
 /**
  * Check if we're about to draw into the front color buffer.
  * If so, set the intel->front_buffer_dirty field to true.
index a3a99cea5cdffae612ee70d8a1bed5c692b133e4..eb030f1918759952e46913661ca96878a2685be0 100644 (file)
@@ -36,8 +36,6 @@
 struct intel_context;
 struct intel_framebuffer;
 
-extern struct intel_region *intel_readbuf_region(struct intel_context *intel);
-
 extern void intel_check_front_buffer_rendering(struct intel_context *intel);
 
 extern void intelInitBufferFuncs(struct dd_function_table *functions);
index 1e98cf4215d72a17f0fa62b3d0cfe70c66bc078b..65cb50ed2e6acfe2cfeabb354dbb1e4c4a9041fc 100644 (file)
  *
  */
 
-#define PCI_CHIP_I810                  0x7121
-#define PCI_CHIP_I810_DC100            0x7123
-#define PCI_CHIP_I810_E                        0x7125
-#define PCI_CHIP_I815                  0x1132
-
-#define PCI_CHIP_I830_M                        0x3577
-#define PCI_CHIP_845_G                 0x2562
-#define PCI_CHIP_I855_GM               0x3582
-#define PCI_CHIP_I865_G                        0x2572
-
-#define PCI_CHIP_I915_G                        0x2582
-#define PCI_CHIP_E7221_G               0x258A
-#define PCI_CHIP_I915_GM               0x2592
-#define PCI_CHIP_I945_G                        0x2772
-#define PCI_CHIP_I945_GM               0x27A2
-#define PCI_CHIP_I945_GME              0x27AE
-
-#define PCI_CHIP_Q35_G                 0x29B2
-#define PCI_CHIP_G33_G                 0x29C2
-#define PCI_CHIP_Q33_G                 0x29D2
-
 #define PCI_CHIP_IGD_GM                        0xA011
 #define PCI_CHIP_IGD_G                 0xA001
 
 #define PCI_CHIP_HASWELL_CRW_E_GT2      0x0D1E
 #define PCI_CHIP_HASWELL_CRW_E_GT3      0x0D2E
 
-#define IS_MOBILE(devid)       (devid == PCI_CHIP_I855_GM || \
-                                devid == PCI_CHIP_I915_GM || \
-                                devid == PCI_CHIP_I945_GM || \
-                                devid == PCI_CHIP_I945_GME || \
-                                devid == PCI_CHIP_I965_GM || \
-                                devid == PCI_CHIP_I965_GME || \
-                                devid == PCI_CHIP_GM45_GM || \
-                                IS_IGD(devid) || \
-                                devid == PCI_CHIP_ILM_G)
-
 #define IS_G45(devid)           (devid == PCI_CHIP_IGD_E_G || \
                                  devid == PCI_CHIP_Q45_G || \
                                  devid == PCI_CHIP_G45_G || \
 #define IS_ILM(devid)           (devid == PCI_CHIP_ILM_G)
 #define IS_GEN5(devid)          (IS_ILD(devid) || IS_ILM(devid))
 
-#define IS_915(devid)          (devid == PCI_CHIP_I915_G || \
-                                devid == PCI_CHIP_E7221_G || \
-                                devid == PCI_CHIP_I915_GM)
-
-#define IS_945(devid)          (devid == PCI_CHIP_I945_G || \
-                                devid == PCI_CHIP_I945_GM || \
-                                devid == PCI_CHIP_I945_GME || \
-                                devid == PCI_CHIP_G33_G || \
-                                devid == PCI_CHIP_Q33_G || \
-                                devid == PCI_CHIP_Q35_G || IS_IGD(devid))
-
-#define IS_GEN4(devid)         (devid == PCI_CHIP_I965_G || \
-                                devid == PCI_CHIP_I965_Q || \
-                                devid == PCI_CHIP_I965_G_1 || \
-                                devid == PCI_CHIP_I965_GM || \
-                                devid == PCI_CHIP_I965_GME || \
-                                devid == PCI_CHIP_I946_GZ || \
-                                IS_G4X(devid))
-
-/* Compat macro for intel_decode.c */
-#define IS_IRONLAKE(devid)     IS_GEN5(devid)
-
 #define IS_SNB_GT1(devid)      (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \
                                 devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
                                 devid == PCI_CHIP_SANDYBRIDGE_S)
 #define IS_HASWELL(devid)       (IS_HSW_GT1(devid) || \
                                 IS_HSW_GT2(devid) || \
                                 IS_HSW_GT3(devid))
-
-#define IS_965(devid)          (IS_GEN4(devid) || \
-                                IS_G4X(devid) || \
-                                IS_GEN5(devid) || \
-                                IS_GEN6(devid) || \
-                                IS_GEN7(devid))
-
-#define IS_9XX(devid)          (IS_915(devid) || \
-                                IS_945(devid) || \
-                                IS_965(devid))
-
-#define IS_GEN3(devid)         (IS_915(devid) ||       \
-                                IS_945(devid))
-
-#define IS_GEN2(devid)         (devid == PCI_CHIP_I830_M || \
-                                devid == PCI_CHIP_845_G ||  \
-                                devid == PCI_CHIP_I855_GM ||   \
-                                devid == PCI_CHIP_I865_G)
index faa44e69acb6308b61ee2bd353e20578aa339654..55e1315622f5dfbd0828031ff9a10c4a24c8e26b 100644 (file)
@@ -53,19 +53,9 @@ extern "C" {
 
 #include "tnl/t_vertex.h"
 
-#define TAG(x) intel##x
-#include "tnl_dd/t_dd_vertex.h"
-#undef TAG
-
 struct intel_region;
 struct intel_context;
 
-typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
-                                intelVertex *, intelVertex *);
-typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
-                                 intelVertex *);
-typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
-
 #define INTEL_WRITE_PART  0x1
 #define INTEL_WRITE_FULL  0x2
 #define INTEL_READ        0x4
@@ -194,8 +184,6 @@ struct intel_context
    bool has_llc;
    bool has_swizzling;
 
-   int urb_size;
-
    drm_intel_context *hw_ctx;
 
    struct intel_batchbuffer batch;
@@ -494,10 +482,6 @@ void
 intel_resolve_for_dri2_flush(struct intel_context *intel,
                              __DRIdrawable *drawable);
 
-void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
-                                 uint32_t buffer_id);
-void intel_init_texture_formats(struct gl_context *ctx);
-
 /*======================================================================
  * Inline conversion functions.  
  * These are better-typed than the macros used previously:
index 9991c0001086438fc8299f7645edc2111c2ad89f..9c1f271a67c3214852a7df34465e79cdc8f3e3e0 100644 (file)
 extern void
 intelInitExtensions(struct gl_context *ctx);
 
-extern void
-intelInitExtensionsES1(struct gl_context *ctx);
-
-extern void
-intelInitExtensionsES2(struct gl_context *ctx);
-
-
 #endif
index dea5ffffc0ec12cf8015b1a7502acdaebf11595e..9ef9b70fff5f2c1e1ced0554b5db2652306a8db6 100644 (file)
 
 #define FILE_DEBUG_FLAG DEBUG_FBO
 
-static struct gl_renderbuffer *
-intel_new_renderbuffer(struct gl_context * ctx, GLuint name);
-
-struct intel_region*
-intel_get_rb_region(struct gl_framebuffer *fb, GLuint attIndex)
-{
-   struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, attIndex);
-   if (irb && irb->mt) {
-      if (attIndex == BUFFER_STENCIL && irb->mt->stencil_mt)
-        return irb->mt->stencil_mt->region;
-      else
-        return irb->mt->region;
-   } else
-      return NULL;
-}
-
 /**
  * Create a new framebuffer object.
  */
index 5f40d352836e85511e744b081700a2a51a435542..af3a835d82a77e43ce44eac2e6045094479e241a 100644 (file)
@@ -141,10 +141,6 @@ intel_create_wrapped_renderbuffer(struct gl_context * ctx,
 extern void
 intel_fbo_init(struct intel_context *intel);
 
-
-extern void
-intel_flip_renderbuffers(struct gl_framebuffer *fb);
-
 void
 intel_renderbuffer_set_draw_offset(struct intel_renderbuffer *irb);
 
@@ -157,9 +153,6 @@ intel_renderbuffer_get_tile_offsets(struct intel_renderbuffer *irb,
                                          tile_x, tile_y);
 }
 
-struct intel_region*
-intel_get_rb_region(struct gl_framebuffer *fb, GLuint attIndex);
-
 void
 intel_renderbuffer_set_needs_downsample(struct intel_renderbuffer *irb);
 
index c51194a88f74543843994512a2674fc600c976dd..456ee9735361f835334df8a99d8040ec83599d78 100644 (file)
@@ -554,11 +554,6 @@ intel_miptree_check_level_layer(struct intel_mipmap_tree *mt,
    assert(layer < mt->level[level].depth);
 }
 
-int intel_miptree_pitch_align (struct intel_context *intel,
-                              struct intel_mipmap_tree *mt,
-                              uint32_t tiling,
-                              int pitch);
-
 void intel_miptree_reference(struct intel_mipmap_tree **dst,
                              struct intel_mipmap_tree *src);
 
@@ -598,30 +593,6 @@ intel_miptree_copy_teximage(struct intel_context *intel,
                             struct intel_texture_image *intelImage,
                             struct intel_mipmap_tree *dst_mt, bool invalidate);
 
-/**
- * Copy the stencil data from \c mt->stencil_mt->region to \c mt->region for
- * the given miptree slice.
- *
- * \see intel_mipmap_tree::stencil_mt
- */
-void
-intel_miptree_s8z24_scatter(struct intel_context *intel,
-                            struct intel_mipmap_tree *mt,
-                            uint32_t level,
-                            uint32_t slice);
-
-/**
- * Copy the stencil data in \c mt->stencil_mt->region to \c mt->region for the
- * given miptree slice.
- *
- * \see intel_mipmap_tree::stencil_mt
- */
-void
-intel_miptree_s8z24_gather(struct intel_context *intel,
-                           struct intel_mipmap_tree *mt,
-                           uint32_t level,
-                           uint32_t layer);
-
 bool
 intel_miptree_alloc_mcs(struct intel_context *intel,
                         struct intel_mipmap_tree *mt,
index 1fb6b2757721bd102f56018b07b5179dbb855e73..c9f5ecc77e9245c7561c17b88fd329ccf1d0656a 100644 (file)
@@ -101,8 +101,6 @@ void intel_region_reference(struct intel_region **dst,
 
 void intel_region_release(struct intel_region **ib);
 
-void intel_recreate_static_regions(struct intel_context *intel);
-
 void
 intel_region_get_tile_masks(struct intel_region *region,
                             uint32_t *mask_x, uint32_t *mask_y,
index a08fdf4aa71dff5de0aed80d8f74709b5cf70b7c..c6302c3db707d6aeaa234b06d6845c9bef2be261 100644 (file)
@@ -55,19 +55,6 @@ intel_miptree_create_for_teximage(struct intel_context *intel,
 
 GLuint intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit);
 
-void intel_tex_map_level_images(struct intel_context *intel,
-                               struct intel_texture_object *intelObj,
-                               int level,
-                               GLbitfield mode);
-
-void intel_tex_unmap_level_images(struct intel_context *intel,
-                                 struct intel_texture_object *intelObj,
-                                 int level);
-
-bool
-intel_tex_image_s8z24_create_renderbuffers(struct intel_context *intel,
-                                          struct intel_texture_image *image);
-
 bool
 intel_texsubimage_tiled_memcpy(struct gl_context *ctx,
                                GLuint dims,