mips.md (mips_get_fcsr, [...]): Use SI machine mode for unspec_volatile operand.
authorMihailo Stojanovic <mistojanovic@wavecomp.com>
Fri, 23 Aug 2019 19:04:56 +0000 (19:04 +0000)
committerJeff Law <law@gcc.gnu.org>
Fri, 23 Aug 2019 19:04:56 +0000 (13:04 -0600)
        * config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
        machine mode for unspec_volatile operand.

        * gcc.target/mips/get-fcsr-3.c: New test.

From-SVN: r274863

gcc/ChangeLog
gcc/config/mips/mips.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/mips/get-fcsr-3.c [new file with mode: 0644]

index 3fbdb937f2197d533c75904c43526725471a799c..989dff795f778dfe3a45b0a111581696724b771b 100644 (file)
@@ -1,3 +1,8 @@
+2019-08-23  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
+
+       * config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
+       machine mode for unspec_volatile operand.
+
 2019-08-23  Wilco Dijkstra  <wdijkstr@arm.com>
 
        * gcc/doc/invoke.texi (mneon-for-64bits): Deprecate option.
index e17b1d522f0c15a90671aabf6f70a72476d96dda..4ad5c62c9a37deb5dbf7bd83c87dcde547dafad7 100644 (file)
 ;; __builtin_mips_get_fcsr: move the FCSR into operand 0.
 (define_expand "mips_get_fcsr"
   [(set (match_operand:SI 0 "register_operand")
-       (unspec_volatile [(const_int 0)] UNSPEC_GET_FCSR))]
+       (unspec_volatile:SI [(const_int 0)] UNSPEC_GET_FCSR))]
   "TARGET_HARD_FLOAT_ABI"
 {
   if (TARGET_MIPS16)
 
 (define_insn "*mips_get_fcsr"
   [(set (match_operand:SI 0 "register_operand" "=d")
-       (unspec_volatile [(const_int 0)] UNSPEC_GET_FCSR))]
+       (unspec_volatile:SI [(const_int 0)] UNSPEC_GET_FCSR))]
   "TARGET_HARD_FLOAT"
   "cfc1\t%0,$31")
 
index 887496ee1a6ff46d01f5f1bd1d9a170d47994dc8..92e6da2602d913a4912d7883e760ab6fc9276f6c 100644 (file)
@@ -1,3 +1,7 @@
+2019-08-23  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
+
+       * gcc.target/mips/get-fcsr-3.c: New test.
+
 2019-08-23  Martin Sebor  <msebor@redhat.com>
 
        * gcc.dg/Warray-bounds-36.c: Make functions static to avoid failures
diff --git a/gcc/testsuite/gcc.target/mips/get-fcsr-3.c b/gcc/testsuite/gcc.target/mips/get-fcsr-3.c
new file mode 100644 (file)
index 0000000..7bb97b6
--- /dev/null
@@ -0,0 +1,9 @@
+/* { dg-options "-mabi=64 -mhard-float" } */
+
+NOMIPS16 unsigned int
+foo (void)
+{
+  return __builtin_mips_get_fcsr () & 0x1;
+}
+
+/* { dg-final { scan-assembler "cfc1" } } */