* config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
machine mode for unspec_volatile operand.
* gcc.target/mips/get-fcsr-3.c: New test.
From-SVN: r274863
+2019-08-23 Mihailo Stojanovic <mistojanovic@wavecomp.com>
+
+ * config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
+ machine mode for unspec_volatile operand.
+
2019-08-23 Wilco Dijkstra <wdijkstr@arm.com>
* gcc/doc/invoke.texi (mneon-for-64bits): Deprecate option.
;; __builtin_mips_get_fcsr: move the FCSR into operand 0.
(define_expand "mips_get_fcsr"
[(set (match_operand:SI 0 "register_operand")
- (unspec_volatile [(const_int 0)] UNSPEC_GET_FCSR))]
+ (unspec_volatile:SI [(const_int 0)] UNSPEC_GET_FCSR))]
"TARGET_HARD_FLOAT_ABI"
{
if (TARGET_MIPS16)
(define_insn "*mips_get_fcsr"
[(set (match_operand:SI 0 "register_operand" "=d")
- (unspec_volatile [(const_int 0)] UNSPEC_GET_FCSR))]
+ (unspec_volatile:SI [(const_int 0)] UNSPEC_GET_FCSR))]
"TARGET_HARD_FLOAT"
"cfc1\t%0,$31")
+2019-08-23 Mihailo Stojanovic <mistojanovic@wavecomp.com>
+
+ * gcc.target/mips/get-fcsr-3.c: New test.
+
2019-08-23 Martin Sebor <msebor@redhat.com>
* gcc.dg/Warray-bounds-36.c: Make functions static to avoid failures
--- /dev/null
+/* { dg-options "-mabi=64 -mhard-float" } */
+
+NOMIPS16 unsigned int
+foo (void)
+{
+ return __builtin_mips_get_fcsr () & 0x1;
+}
+
+/* { dg-final { scan-assembler "cfc1" } } */