re PR middle-end/80173 (ICE in store_bit_field_1, at expmed.c:787)

	PR middle-end/80173
	* expmed.c (store_bit_field_1): Don't attempt to create
	a word subreg out of hard registers wider than word if they
	have HARD_REGNO_NREGS of 1 for their mode.

	* gcc.target/i386/pr80173.c: New test.

From-SVN: r246608

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 65aaca777060a3712576615b8b2182a21c3f0b5b..ba4f7fd0dbb937d2e117f628b40c3cbdd64515cb 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,10 @@
 2017-03-31  Jakub Jelinek  <jakub@redhat.com>
 
+       PR middle-end/80173
+       * expmed.c (store_bit_field_1): Don't attempt to create
+       a word subreg out of hard registers wider than word if they
+       have HARD_REGNO_NREGS of 1 for their mode.
+
        PR middle-end/80163
        * varasm.c (initializer_constant_valid_p_1): Disallow sign-extending
        conversions to integer types wider than word and pointer.

diff --git a/gcc/expmed.c b/gcc/expmed.c
index bcc5922510006d74c135cd2a973d4350d19173b5..c0260c53853cda4deffca4ca4cdd9c825e023aef 100644 (file)
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -965,8 +965,14 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
     }
 
   /* If OP0 is a multi-word register, narrow it to the affected word.
-     If the region spans two words, defer to store_split_bit_field.  */
-  if (!MEM_P (op0) && GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
+     If the region spans two words, defer to store_split_bit_field.
+     Don't do this if op0 is a single hard register wider than word
+     such as a float or vector register.  */
+  if (!MEM_P (op0)
+      && GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD
+      && (!REG_P (op0)
+         || !HARD_REGISTER_P (op0)
+         || HARD_REGNO_NREGS (REGNO (op0), GET_MODE (op0)) != 1))
     {
       if (bitnum % BITS_PER_WORD + bitsize > BITS_PER_WORD)
        {

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index af79d42596fca23a80fd22972febfb0ac89b4a45..9297d53356803227a084beb4e3077d32eb4c97d9 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,8 @@
 2017-03-31  Jakub Jelinek  <jakub@redhat.com>
 
+       PR middle-end/80173
+       * gcc.target/i386/pr80173.c: New test.
+
        PR middle-end/80163
        * gcc.dg/pr80163.c: New test.
 

diff --git a/gcc/testsuite/gcc.target/i386/pr80173.c b/gcc/testsuite/gcc.target/i386/pr80173.c
new file mode 100644 (file)
index 0000000..7abd404
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr80173.c
@@ -0,0 +1,22 @@
+/* PR middle-end/80173 */
+/* { dg-do compile { target lp64 } } */
+/* { dg-options "-O2 -ffixed-xmm7" } */
+
+typedef int V __attribute__ ((vector_size (2 * sizeof (int))));
+
+struct U { V a; V b; };
+
+int
+foo (int i)
+{
+  register struct U u asm ("xmm7") = {{-1, 0}, {-1, 0}};
+  return u.b[i];
+}
+
+int
+bar (int i)
+{
+  register struct U u asm ("xmm7");
+  u = (struct U) {{-1, 0}, {-1, 0}};
+  return u.b[i];
+}