Exclude 32-bit archs from warn-vect-op* tests.

From-SVN: r179991

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 83d14d0656cb6b1e777ce683180e493b36611af0..140630e8fc8ca6cd2da905613d344a7a3e02ff3b 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2011-10-14  Artjoms Sinkarovs  <artyom.shinkaroff@gmail.com>
+
+       * gcc.target/i386/warn-vect-op-3.c: Exclude 32-bit architectures.
+       * gcc.target/i386/warn-vect-op-1.c: Ditto.
+       * gcc.target/i386/warn-vect-op-2.c: Ditto.
+
 2011-10-14  Tobias Burnus  <burnus@net-b.de>
 
        PR fortran/50718

diff --git a/gcc/testsuite/gcc.target/i386/warn-vect-op-1.c b/gcc/testsuite/gcc.target/i386/warn-vect-op-1.c
index f87cf5996fa669d445d9855d6bd4b9db6e9215ca..6fecf926208e946b3caa7371217b4f2fb0b0c15f 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/warn-vect-op-1.c
+++ b/gcc/testsuite/gcc.target/i386/warn-vect-op-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile }  */
+/* { dg-do compile { target { ! { ia32 } } } }  */
 /* { dg-options "-mno-sse -Wvector-operation-performance" }  */
 #define vector(elcount, type)  \
 __attribute__((vector_size((elcount)*sizeof(type)))) type

diff --git a/gcc/testsuite/gcc.target/i386/warn-vect-op-2.c b/gcc/testsuite/gcc.target/i386/warn-vect-op-2.c
index f081d8a9dbef763086ed7de54d003155fd815f2a..6e631192445681fb61bfd9e3aa12c62a18aa246b 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/warn-vect-op-2.c
+++ b/gcc/testsuite/gcc.target/i386/warn-vect-op-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile }  */
+/* { dg-do compile { target { ! { ia32 } } } }  */
 /* { dg-options "-mno-sse -Wvector-operation-performance" }  */
 #define vector(elcount, type)  \
 __attribute__((vector_size((elcount)*sizeof(type)))) type

diff --git a/gcc/testsuite/gcc.target/i386/warn-vect-op-3.c b/gcc/testsuite/gcc.target/i386/warn-vect-op-3.c
index ccb9e988451bfe06e9e4cc0af3141c0ccecc93ce..bdbd8b520b79734a4c8704ca22eed2788b9e2c45 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/warn-vect-op-3.c
+++ b/gcc/testsuite/gcc.target/i386/warn-vect-op-3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile }  */
+/* { dg-do compile { target { ! { ia32 } } } }  */
 /* { dg-options "-mno-sse -Wvector-operation-performance" }  */
 #define vector(elcount, type)  \
 __attribute__((vector_size((elcount)*sizeof(type)))) type