div(-0) sets both I/SI and D/SD (PR16522)

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index bfea81bd584b8644fbcf49eaa7e81c0c3ded0fa4..baee5ecf1a633477d8a7caccfc342c41bdfafff3 100644 (file)
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,4 +1,8 @@
 start-sanitize-r5900
+Wed Nov 11 16:53:57 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * r5900.igen (RSQRT): Set both I/SI and D/SD when div-0.
+
 Thu Nov  5 10:29:42 EST 1998  Frank Ch. Eigler  <fche@cygnus.com>
 
        * r5900.igen (r59fp_opdiv): Correct erroneous FGR[FD] reference.

diff --git a/sim/testsuite/mips64r5900-elf/ChangeLog b/sim/testsuite/mips64r5900-elf/ChangeLog
index 16e0931939edc7c40746968db7363dd22198aa70..af9a411fe8f6c6b06e4075ea6a0bf4f52e16264d 100644 (file)
--- a/sim/testsuite/mips64r5900-elf/ChangeLog
+++ b/sim/testsuite/mips64r5900-elf/ChangeLog
@@ -1,3 +1,7 @@
+Wed Nov 11 17:42:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * f-rsqrt.s: div(-0) can set both I/SI + D/SD.
+
 Thu Nov  5 10:37:40 EST 1998  Frank Ch. Eigler <fche@cygnus.com>
 
        * t-prot3w.s: Correct test of prot3w insn.