freedreno/a6xx: register update
authorRob Clark <robdclark@chromium.org>
Sat, 21 Mar 2020 16:49:27 +0000 (09:49 -0700)
committerMarge Bot <eric+marge@anholt.net>
Fri, 27 Mar 2020 22:41:36 +0000 (22:41 +0000)
No functional change, and this register isn't used in userspace.  Just
syncing from envytools tree to eliminate the delta.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>

src/freedreno/registers/a6xx.xml

index 1fdc21e9839168a5890dc2ad60f28f3e7cf0f393..967f138240120af6632f7bf94187106bc2a406b1 100644 (file)
@@ -1072,7 +1072,9 @@ to upconvert to 32b float internally?
                <bitfield high="1" low="1" name="CP_AHB_BUSY_CP_MASTER" />
                <bitfield high="0" low="0" name="CP_AHB_BUSY_CX_MASTER"/>
        </reg32>
-       <reg32 offset="0x0213" name="RBBM_STATUS3"/>
+       <reg32 offset="0x0213" name="RBBM_STATUS3">
+               <bitfield pos="24" name="SMMU_STALLED_ON_FAULT" type="boolean"/>
+       </reg32>
        <reg32 offset="0x0215" name="RBBM_VBIF_GX_RESET_STATUS"/>
        <reg32 offset="0x0400" name="RBBM_PERFCTR_CP_0_LO"/>
        <reg32 offset="0x0401" name="RBBM_PERFCTR_CP_0_HI"/>