cpu: Relax check on squashed non-speculative instructions
authorAndreas Hansson <andreas.hansson@arm.com>
Fri, 24 Jan 2014 21:29:29 +0000 (15:29 -0600)
committerAndreas Hansson <andreas.hansson@arm.com>
Fri, 24 Jan 2014 21:29:29 +0000 (15:29 -0600)
This patch relaxes the check performed when squashing non-speculative
instructions, as it caused problems with loads that were marked ready,
and then stalled on a blocked cache. The assertion is now allowing
memory references to be non-faulting.

src/cpu/o3/inst_queue_impl.hh

index f0b6826028bcd6ac5901da03d8125ec41c4628ca..8f0249ced787ad7ca0515470856edf4e69aec4c1 100644 (file)
@@ -1192,8 +1192,15 @@ InstructionQueue<Impl>::doSquash(ThreadID tid)
                 NonSpecMapIt ns_inst_it =
                     nonSpecInsts.find(squashed_inst->seqNum);
 
+                // we remove non-speculative instructions from
+                // nonSpecInsts already when they are ready, and so we
+                // cannot always expect to find them
                 if (ns_inst_it == nonSpecInsts.end()) {
-                    assert(squashed_inst->getFault() != NoFault);
+                    // loads that became ready but stalled on a
+                    // blocked cache are alreayd removed from
+                    // nonSpecInsts, and have not faulted
+                    assert(squashed_inst->getFault() != NoFault ||
+                           squashed_inst->isMemRef());
                 } else {
 
                     (*ns_inst_it).second = NULL;