ac/nir,radv: move force_persample to ac_shader_info::force_persample

Avoid accessing radv-specific structures during the meat of NIR-to-LLVM
translation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 8b76cd9cbe66e99a24e476ed856a581eaa2ac2c9..a60a900073c93607837d8dd312207cdad3c6aa51 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -4003,11 +4003,9 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
                        fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
                break;
        case nir_intrinsic_load_sample_id:
-               ctx->nctx->shader_info->fs.force_persample = true;
                result = unpack_param(ctx->nctx, ctx->nctx->ancillary, 8, 4);
                break;
        case nir_intrinsic_load_sample_pos:
-               ctx->nctx->shader_info->fs.force_persample = true;
                result = load_sample_pos(ctx->nctx);
                break;
        case nir_intrinsic_load_sample_mask_in:
@@ -4960,7 +4958,7 @@ handle_fs_input_decl(struct nir_to_llvm_context *ctx,
                unsigned interp_type;
                if (variable->data.sample) {
                        interp_type = INTERP_SAMPLE;
-                       ctx->shader_info->fs.force_persample = true;
+                       ctx->shader_info->info.ps.force_persample = true;
                } else if (variable->data.centroid)
                        interp_type = INTERP_CENTROID;
                else

diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 0cb48a86469e2a4ace14e0e8465616bc06524139..7def4b72f9fd0803818a7bc2fb0b56518058b2a1 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -169,7 +169,6 @@ struct ac_shader_variant_info {
                        bool writes_sample_mask;
                        bool early_fragment_test;
                        bool writes_memory;
-                       bool force_persample;
                        bool prim_id_input;
                        bool layer_input;
                } fs;

diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index 7d34535c1073ad12e43d27703bc0190f33c927de..8668c4c344679fe82df9016e0d4bff44ffd74bc9 100644 (file)
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -45,6 +45,12 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, struct ac_shader_info *info)
        case nir_intrinsic_load_num_work_groups:
                info->cs.grid_components_used = instr->num_components;
                break;
+       case nir_intrinsic_load_sample_id:
+               info->ps.force_persample = true;
+               break;
+       case nir_intrinsic_load_sample_pos:
+               info->ps.force_persample = true;
+               break;
        case nir_intrinsic_vulkan_resource_index:
                info->desc_set_used_mask |= (1 << nir_intrinsic_desc_set(instr));
                break;

diff --git a/src/amd/common/ac_shader_info.h b/src/amd/common/ac_shader_info.h
index 5bc16cc9d0276f073fd550371ed819172f708210..965ad542a2acb926d06970120e282eb8f08f8447 100644 (file)
--- a/src/amd/common/ac_shader_info.h
+++ b/src/amd/common/ac_shader_info.h
@@ -36,6 +36,7 @@ struct ac_shader_info {
                bool needs_instance_id;
        } vs;
        struct {
+               bool force_persample;
                bool needs_sample_positions;
        } ps;
        struct {

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 4b087811710a5345c8129035793c99187086ddaf..7b41e16e916f3bd7ce336c2095f89293889edb98 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -836,7 +836,7 @@ radv_emit_fragment_shader(struct radv_cmd_buffer *cmd_buffer,
        radeon_set_context_reg(cmd_buffer->cs, R_0286D0_SPI_PS_INPUT_ADDR,
                               ps->config.spi_ps_input_addr);
 
-       if (ps->info.fs.force_persample)
+       if (ps->info.info.ps.force_persample)
                spi_baryc_cntl |= S_0286E0_POS_FLOAT_LOCATION(2);
 
        radeon_set_context_reg(cmd_buffer->cs, R_0286D8_SPI_PS_IN_CONTROL,

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 496c06a148533e90df73cbb0f2a65ccaa3977d6d..c4407ec7e231bea97c167be8a76c8ba8549e9ef9 100644 (file)
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1351,7 +1351,7 @@ radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline,
 
        if (vkms && vkms->sampleShadingEnable) {
                ps_iter_samples = ceil(vkms->minSampleShading * ms->num_samples);
-       } else if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.force_persample) {
+       } else if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.force_persample) {
                ps_iter_samples = ms->num_samples;
        }