arch-power: Set initial register state before loading OPAL

Change-Id: If4d753a96652e3bde5b2a992d64def64138ac518
Signed-off-by: Kajol Jain <kajoljain797@gmail.com>

diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index 3c0a4baa0d74911ad66c805cea908e7b49676cf7..61f14ee5609ee6ae41dc9390a5e9f8d0ded9f276 100644 (file)
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -624,6 +624,7 @@ decode PO default Unknown::unknown() {
                 0x3a1: mfiamr({{Rt = IAMR;}});
                 0x3a4: mfuamor({{ Rt = UAMOR; }}, [ IsPrivileged ]);
                 0x3aa: mfamor({{Rt = AMOR;}});
+                0x3a9: mfspr({{ }});
                 0x3c5: mfhfscr({{Rt = HFSCR;}});
                 0x3c9: mflpcr({{Rt = LPCR;}});
                 0x3E8: mfpvr({{ Rt = PVR; }});

diff --git a/src/arch/power/system.cc b/src/arch/power/system.cc
index 2acee2695cca7a4b9e808e2c584782caedf0e300..32580d15f360ec33eee4da229bc1a07f8f815095 100644 (file)
--- a/src/arch/power/system.cc
+++ b/src/arch/power/system.cc
@@ -87,7 +87,11 @@ PowerSystem::initState()
     tc->setIntReg(ArgumentReg0, 0x1800000);
     ThreadID tid = 1;
     ThreadContext *tc1 = threadContexts[tid];
-    tc1->pcState(0xc00000000000a840);
-    tc1->setIntReg(ArgumentReg0, 0x1);
+    tc1->pcState(0x10);
+    tc1->setIntReg(INTREG_PVR , 0x004e0200);
+    tc1->setIntReg(INTREG_MSR , msr);
+    tc1->setIntReg(ArgumentReg0, 0x1800000);
+    //tc1->pcState(0xc00000000000a840);
+    //tc1->setIntReg(ArgumentReg0, 0x1);
     tc1->setIntReg(INTREG_PIR,0x1);
 }