qir_print_reg(c, inst->dst, true);
if (inst->dst.pack) {
- if (qir_is_mul(inst)) {
- switch (inst->dst.pack) {
- case QPU_PACK_MUL_8888:
- fprintf(stderr, ".8888");
- break;
- case QPU_PACK_MUL_8A:
- fprintf(stderr, ".8a");
- break;
- case QPU_PACK_MUL_8B:
- fprintf(stderr, ".8b");
- break;
- case QPU_PACK_MUL_8C:
- fprintf(stderr, ".8c");
- break;
- case QPU_PACK_MUL_8D:
- fprintf(stderr, ".8d");
- break;
- }
- } else {
- unreachable("packs only set up for MULs so far.\n");
+ if (inst->dst.pack) {
+ if (qir_is_mul(inst))
+ vc4_qpu_disasm_pack_mul(stderr, inst->dst.pack);
+ else
+ vc4_qpu_disasm_pack_a(stderr, inst->dst.pack);
}
}
for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) {
#ifndef VC4_QPU_H
#define VC4_QPU_H
+#include <stdio.h>
#include <stdint.h>
#include "util/u_math.h"
void
vc4_qpu_disasm(const uint64_t *instructions, int num_instructions);
+void
+vc4_qpu_disasm_pack_mul(FILE *out, uint32_t pack);
+
+void
+vc4_qpu_disasm_pack_a(FILE *out, uint32_t pack);
+
void
vc4_qpu_validate(uint64_t *insts, uint32_t num_inst);
return special_write[reg];
}
+void
+vc4_qpu_disasm_pack_mul(FILE *out, uint32_t pack)
+{
+ fprintf(out, ".%s", DESC(qpu_pack_mul, pack));
+}
+
+void
+vc4_qpu_disasm_pack_a(FILE *out, uint32_t pack)
+{
+ fprintf(out, "%s", DESC(qpu_pack_a, pack));
+}
+
static void
print_alu_dst(uint64_t inst, bool is_mul)
{
fprintf(stderr, "%s%d?", file, waddr);
if (is_mul && (inst & QPU_PM)) {
- fprintf(stderr, ".%s", DESC(qpu_pack_mul, pack));
+ vc4_qpu_disasm_pack_mul(stderr, pack);
} else if (is_a && !(inst & QPU_PM)) {
- fprintf(stderr, "%s", DESC(qpu_pack_a, pack));
+ vc4_qpu_disasm_pack_a(stderr, pack);
}
}