Fix B_WIDTH > DSP_B_MAXWIDTH case
authorEddie Hung <eddie@fpgeh.com>
Thu, 1 Aug 2019 17:01:43 +0000 (10:01 -0700)
committerEddie Hung <eddie@fpgeh.com>
Thu, 1 Aug 2019 17:01:43 +0000 (10:01 -0700)
techlibs/common/mul2dsp.v

index bfd216fbf06b616c81e78d68e899913569839fa9..b28a4247ed9bc2087ae2a4fa88a482c1be4ec068 100644 (file)
@@ -67,22 +67,6 @@ module \$mul (A, B, Y);
                        .B(A),\r
                        .Y(Y)\r
                );\r
-       else if (A_SIGNED && (A_WIDTH > `DSP_A_MAXWIDTH || B_WIDTH > `DSP_B_MAXWIDTH)) begin\r
-               wire _;\r
-               \$__mul #(\r
-                       .A_SIGNED(A_SIGNED),\r
-                       .B_SIGNED(B_SIGNED),\r
-                       .A_WIDTH(A_WIDTH),\r
-                       .B_WIDTH(B_WIDTH),\r
-                       .Y_WIDTH(Y_WIDTH)\r
-               ) _TECHMAP_REPLACE_ (\r
-                       .A(A),\r
-                       .B(B),\r
-                       .Y({_,Y[Y_WIDTH-2:0]})\r
-               );\r
-               // For non-zero results, recompute sign bit\r
-               assign Y[Y_WIDTH-1] = (|Y[Y_WIDTH-2:0]) & (A[A_WIDTH-1] ^ B[B_WIDTH-1]);\r
-       end\r
        else\r
                \$__mul #(\r
                        .A_SIGNED(A_SIGNED),\r
@@ -171,14 +155,15 @@ module \$__mul (A, B, Y);
                                assign partial_sum[i] = (partial[i] << i*(`DSP_A_MAXWIDTH-sign_headroom)) + partial_sum[i-1];\r
                        end\r
 \r
+                       localparam last_A_WIDTH = A_WIDTH-(n-1)*(`DSP_A_MAXWIDTH-sign_headroom);\r
                        \$__mul #(\r
                                .A_SIGNED(A_SIGNED),\r
                                .B_SIGNED(B_SIGNED),\r
-                               .A_WIDTH(A_WIDTH-(n-1)*(`DSP_A_MAXWIDTH-sign_headroom)),\r
+                               .A_WIDTH(last_A_WIDTH),\r
                                .B_WIDTH(B_WIDTH),\r
                                .Y_WIDTH(last_Y_WIDTH)\r
                        ) mul_slice_last (\r
-                               .A(A[A_WIDTH-1 : (n-1)*(`DSP_A_MAXWIDTH-sign_headroom)]),\r
+                               .A(A[A_WIDTH-1 -: last_A_WIDTH]),\r
                                .B(B),\r
                                .Y(last_partial)\r
                        );\r
@@ -232,20 +217,17 @@ module \$__mul (A, B, Y);
                        end\r
 \r
                        localparam last_B_WIDTH = B_WIDTH-(n-1)*(`DSP_B_MAXWIDTH-sign_headroom);\r
-                       if (A_SIGNED && B_SIGNED && last_B_WIDTH == 1)\r
-                               assign last_partial = 0;\r
-                       else\r
-                               \$__mul #(\r
-                                       .A_SIGNED(A_SIGNED),\r
-                                       .B_SIGNED(B_SIGNED),\r
-                                       .A_WIDTH(A_WIDTH),\r
-                                       .B_WIDTH(last_B_WIDTH),\r
-                                       .Y_WIDTH(last_Y_WIDTH)\r
-                               ) mul_last (\r
-                                       .A(A),\r
-                                       .B(B[B_WIDTH-1 -: last_B_WIDTH]),\r
-                                       .Y(last_partial)\r
-                               );\r
+                       \$__mul #(\r
+                               .A_SIGNED(A_SIGNED),\r
+                               .B_SIGNED(B_SIGNED),\r
+                               .A_WIDTH(A_WIDTH),\r
+                               .B_WIDTH(last_B_WIDTH),\r
+                               .Y_WIDTH(last_Y_WIDTH)\r
+                       ) mul_last (\r
+                               .A(A),\r
+                               .B(B[B_WIDTH-1 -: last_B_WIDTH]),\r
+                               .Y(last_partial)\r
+                       );\r
                        assign partial_sum[n-1] = (last_partial << (n-1)*(`DSP_B_MAXWIDTH-sign_headroom)) + partial_sum[n-2];\r
                        assign Y = partial_sum[n-1];\r
                end\r