re PR target/16477 (Failure of gcc.c-torture/execute/strct-stdarg-1.c)

	PR target/16477
	* pa.c (function_arg): Update comment.
	* pa.h (BLOCK_REG_PADDING): Define.

From-SVN: r84598

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a0bdea81285b0205629e1e75f4ce417de28f74e2..fe84ab5ec21144e0a11b1b6a43c141b5a6665c88 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2004-07-12  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+       PR target/16477
+       * pa.c (function_arg): Update comment.
+       * pa.h (BLOCK_REG_PADDING): Define.
+
 2004-07-12  Zdenek Dvorak  <rakdver@atrey.karlin.mff.cuni.cz>
 
        PR tree-optimization/16461

diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 9435a63d38201640f588e67c74a57aeefaa1f5fc..ccc8f288fb692dccd7e18124029c98acfc37a33d 100644 (file)
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -8915,21 +8915,9 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
          /* Structures 5 to 8 bytes in size are passed in the general
             registers in the same manner as other non floating-point
             objects.  The data is right-justified and zero-extended
-            to 64 bits.
-
-            This is magic.  Normally, using a PARALLEL results in left
-            justified data on a big-endian target.  However, using a
-            single double-word register provides the required right
-            justification for 5 to 8 byte structures.  This has nothing
-            to do with the direction of padding specified for the argument.
-            It has to do with how the data is widened and shifted into
-            and from the register.
-
-            Aside from adding load_multiple and store_multiple patterns,
-            this is the only way that I have found to obtain right
-            justification of BLKmode data when it has a size greater
-            than one word.  Splitting the operation into two SImode loads
-            or returning a DImode REG results in left justified data.  */
+            to 64 bits.  This is opposite to the normal justification
+            used on big endian targets and requires special treatment.
+            We now define BLOCK_REG_PADDING to pad these objects.  */
          if (mode == BLKmode)
            {
              rtx loc = gen_rtx_EXPR_LIST (VOIDmode,

diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index a7f82c3a484d96487602103f4371cc61f0386d22..f82e09b1687193749e14591a94d7a2aa8d89401b 100644 (file)
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -869,8 +869,21 @@ struct hppa_args {int words, nargs_prototype, incoming, indirect; };
   the standard parameter passing conventions on the RS6000.  That's why
   you'll see lots of similar code in rs6000.h.  */
 
+/* If defined, a C expression which determines whether, and in which
+   direction, to pad out an argument with extra space.  */
 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
 
+/* Specify padding for the last element of a block move between registers
+   and memory.
+
+   The 64-bit runtime specifies that objects need to be left justified
+   (i.e., the normal justification for a big endian target).  The 32-bit
+   runtime specifies right justification for objects smaller than 64 bits.
+   We use a DImode register in the parallel for 5 to 7 byte structures
+   so that there is only one element.  This allows the object to be
+   correctly padded.  */
+#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) (TARGET_64BIT ? upward : downward)
+
 /* Do not expect to understand this without reading it several times.  I'm
    tempted to try and simply it, but I worry about breaking something.  */