softcores, to embedded GPUs for use in mobile processors, to HPC servers
to high end Machine Learning and Robotics applications.
-One interesting thing that has to be made clear - the lesson from Nyuzi
-and Larrabee - is that a good Vector Processor does **not** automatically
-make a good 3D GPU. Jeff Bush designed Nyuzi very specifically to
-replicate the Larrabee team's work. By deliberately not including custom
-3D Hardware Accelerated Opcodes, Nyuzi has only 25% the performance of a modern
-GPU consuming the same amount of power. Put another way: if you want to use
-a pure Vector Engine to get the same performance as a commercially-competitive
-GPU, you need *four times* the power consumption and four times the silicon
-area.
-
-Thus we simply cannot use the upcoming RISC-V Vector Extension, or even
-SimpleV, and expect to automatically have a commercially competitive
-3D GPU. It takes texture opcodes, Z-Buffers, pixel conversion, Linear
-Interpolation, Trascendentals (sin, cos, exp, log), and much more, all
-of which has to be designed, thought through, implemented *and then used
-behind a suitable API*.
+One interesting thing that has to be made clear - the lesson from
+Nyuzi and Larrabee - is that a good Vector Processor does **not**
+automatically make a good 3D GPU. Jeff Bush designed Nyuzi very
+specifically to replicate the Larrabee team's work: in particular, their
+use of a recursive software-based tiling algorithm. By deliberately
+not including custom 3D Hardware Accelerated Opcodes, Nyuzi has only
+25% the performance of a modern GPU consuming the same amount of power.
+Put another way: if you want to use a pure Vector Engine to get the same
+performance as a commercially-competitive GPU, you need *four times*
+the power consumption and four times the silicon area.
+
+Thus we simply cannot use an off-the-shelf Vector extension such as the
+upcoming RISC-V Vector Extension, or even SimpleV, and expect to
+automatically have a commercially competitive 3D GPU. It takes texture
+opcodes, Z-Buffers, pixel conversion, Linear Interpolation, Trascendentals
+(sin, cos, exp, log), and much more, all of which has to be designed,
+thought through, implemented *and then used behind a suitable API*.
In addition, given that the Alliance is to meet the needs of "unusual"
markets, it is no good creating an ISA that has such a high barrier to
entry and such a power-performance penalty that it inherently excludes
the very implementors it is targetted at, particularly in Embedded markets.
+These are the challenges to be discussed at the upcoming first
+[meetup](https://www.meetup.com/Bay-Area-RISC-V-Meetup/events/264231095/)
+at Western Digital's Milpitas HQ.
+
https://youtu.be/HeVz-z4D8os
# Reconfigureable Pipelines